LXR uboot/include/configs/embestmx6boards.h

   1/*
   2 * Copyright (C) 2014 Eukréa Electromatique
   3 * Author: Eric Bénard <eric@eukrea.com>
   4 *
   5 * Configuration settings for the Embest RIoTboard
   6 *
   7 * based on mx6*sabre*.h which are :
   8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
   9 *
  10 * SPDX-License-Identifier:     GPL-2.0+
  11 */
  12
  13#ifndef __RIOTBOARD_CONFIG_H
  14#define __RIOTBOARD_CONFIG_H
  15
  16#define CONFIG_MXC_UART_BASE            UART2_BASE
  17#define CONFIG_CONSOLE_DEV              "ttymxc1"
  18#define CONFIG_MMCROOT                  "/dev/mmcblk1p2"
  19
  20#define PHYS_SDRAM_SIZE         (1u * 1024 * 1024 * 1024)
  21
  22#define CONFIG_IMX_THERMAL
  23
  24/* Size of malloc() pool */
  25#define CONFIG_SYS_MALLOC_LEN           (10 * SZ_1M)
  26
  27#define CONFIG_BOARD_EARLY_INIT_F
  28#define CONFIG_BOARD_LATE_INIT
  29
  30#define CONFIG_MXC_UART
  31
  32/* I2C Configs */
  33#define CONFIG_SYS_I2C
  34#define CONFIG_SYS_I2C_MXC
  35#define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  36#define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  37#define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  38#define CONFIG_SYS_I2C_SPEED            100000
  39
  40/* USB Configs */
  41#define CONFIG_USB_EHCI
  42#define CONFIG_USB_EHCI_MX6
  43#define CONFIG_USB_STORAGE
  44#define CONFIG_USB_HOST_ETHER
  45#define CONFIG_USB_ETHER_ASIX
  46#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  47#define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
  48#define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
  49#define CONFIG_MXC_USB_FLAGS    0
  50
  51/* MMC Configs */
  52#define CONFIG_SYS_FSL_ESDHC_ADDR      0
  53
  54#define CONFIG_FEC_MXC
  55#define CONFIG_MII
  56#define IMX_FEC_BASE                    ENET_BASE_ADDR
  57#define CONFIG_FEC_XCV_TYPE             RGMII
  58#define CONFIG_ETHPRIME                 "FEC"
  59#define CONFIG_FEC_MXC_PHYADDR          4
  60
  61#define CONFIG_PHYLIB
  62#define CONFIG_PHY_ATHEROS
  63
  64#ifdef CONFIG_CMD_SF
  65#define CONFIG_MXC_SPI
  66#define CONFIG_SF_DEFAULT_BUS           0
  67#define CONFIG_SF_DEFAULT_CS            0
  68#define CONFIG_SF_DEFAULT_SPEED         20000000
  69#define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
  70#endif
  71
  72#define CONFIG_CMD_BMODE
  73
  74#define CONFIG_ARP_TIMEOUT     200UL
  75
  76/* Print Buffer Size */
  77#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  78
  79#define CONFIG_SYS_MEMTEST_START       0x10000000
  80#define CONFIG_SYS_MEMTEST_END         0x10010000
  81#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
  82
  83#define CONFIG_STACKSIZE               (128 * 1024)
  84
  85/* Physical Memory Map */
  86#define CONFIG_NR_DRAM_BANKS           1
  87#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
  88
  89#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
  90#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
  91#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
  92
  93#define CONFIG_SYS_INIT_SP_OFFSET \
  94        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  95#define CONFIG_SYS_INIT_SP_ADDR \
  96        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  97
  98/* Environment organization */
  99#define CONFIG_ENV_SIZE                 (8 * 1024)
 100
 101#if defined(CONFIG_ENV_IS_IN_MMC)
 102/* RiOTboard */
 103#define CONFIG_FDTFILE  "imx6dl-riotboard.dtb"
 104#define CONFIG_SYS_FSL_USDHC_NUM        3
 105#define CONFIG_SYS_MMC_ENV_DEV          2       /* SDHC4 */
 106#define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
 107#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
 108#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 109/* MarSBoard */
 110#define CONFIG_FDTFILE  "imx6q-marsboard.dtb"
 111#define CONFIG_SYS_FSL_USDHC_NUM        2
 112#define CONFIG_ENV_OFFSET               (768 * 1024)
 113#define CONFIG_ENV_SECT_SIZE            (8 * 1024)
 114#define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 115#define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 116#define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 117#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 118#endif
 119
 120/* Framebuffer */
 121#define CONFIG_VIDEO
 122#define CONFIG_VIDEO_IPUV3
 123#define CONFIG_CFB_CONSOLE
 124#define CONFIG_VGA_AS_SINGLE_DEVICE
 125#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 126#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 127#define CONFIG_VIDEO_BMP_RLE8
 128#define CONFIG_SPLASH_SCREEN
 129#define CONFIG_SPLASH_SCREEN_ALIGN
 130#define CONFIG_BMP_16BPP
 131#define CONFIG_VIDEO_LOGO
 132#define CONFIG_VIDEO_BMP_LOGO
 133#define CONFIG_IPUV3_CLK 260000000
 134#define CONFIG_IMX_HDMI
 135#define CONFIG_IMX_VIDEO_SKIP
 136
 137#include <config_distro_defaults.h>
 138#include "mx6_common.h"
 139
 140/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 141 * 1M script, 1M pxe and the ramdisk at the end */
 142#define MEM_LAYOUT_ENV_SETTINGS \
 143        "bootm_size=0x10000000\0" \
 144        "kernel_addr_r=0x12000000\0" \
 145        "fdt_addr_r=0x13000000\0" \
 146        "scriptaddr=0x13100000\0" \
 147        "pxefile_addr_r=0x13200000\0" \
 148        "ramdisk_addr_r=0x13300000\0"
 149
 150#define BOOT_TARGET_DEVICES(func) \
 151        func(MMC, mmc, 0) \
 152        func(MMC, mmc, 1) \
 153        func(MMC, mmc, 2) \
 154        func(USB, usb, 0) \
 155        func(PXE, pxe, na) \
 156        func(DHCP, dhcp, na)
 157
 158#include <config_distro_bootcmd.h>
 159
 160#define CONSOLE_STDIN_SETTINGS \
 161        "stdin=serial\0"
 162
 163#define CONSOLE_STDOUT_SETTINGS \
 164        "stdout=serial\0" \
 165        "stderr=serial\0"
 166
 167#define CONSOLE_ENV_SETTINGS \
 168        CONSOLE_STDIN_SETTINGS \
 169        CONSOLE_STDOUT_SETTINGS
 170
 171#define CONFIG_EXTRA_ENV_SETTINGS \
 172        CONSOLE_ENV_SETTINGS \
 173        MEM_LAYOUT_ENV_SETTINGS \
 174        "fdtfile=" CONFIG_FDTFILE "\0" \
 175        BOOTENV
 176
 177#endif                         /* __RIOTBOARD_CONFIG_H */
 178