LXR uboot/include/configs/warp7.h

   1/*
   2 * Copyright (C) 2016 NXP Semiconductors
   3 *
   4 * Configuration settings for the i.MX7S Warp board.
   5 *
   6 * SPDX-License-Identifier:     GPL-2.0+
   7 */
   8
   9#ifndef __WARP7_CONFIG_H
  10#define __WARP7_CONFIG_H
  11
  12#include "mx7_common.h"
  13
  14#define PHYS_SDRAM_SIZE                 SZ_512M
  15
  16#define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
  17
  18/* Size of malloc() pool */
  19#define CONFIG_SYS_MALLOC_LEN           (35 * SZ_1M)
  20
  21#define CONFIG_BOARD_EARLY_INIT_F
  22#define CONFIG_BOARD_LATE_INIT
  23
  24/* MMC Config*/
  25#define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
  26#define CONFIG_SUPPORT_EMMC_BOOT
  27#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
  28#define CONFIG_SYS_MMC_IMG_LOAD_PART    1
  29
  30#define CONFIG_DFU_ENV_SETTINGS \
  31        "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
  32
  33#define CONFIG_EXTRA_ENV_SETTINGS \
  34        CONFIG_DFU_ENV_SETTINGS \
  35        "script=boot.scr\0" \
  36        "image=zImage\0" \
  37        "console=ttymxc0\0" \
  38        "fdt_high=0xffffffff\0" \
  39        "initrd_high=0xffffffff\0" \
  40        "fdt_file=imx7d-warp.dtb\0" \
  41        "fdt_addr=0x83000000\0" \
  42        "boot_fdt=try\0" \
  43        "ip_dyn=yes\0" \
  44        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  45        "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  46        "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  47        "mmcargs=setenv bootargs console=${console},${baudrate} " \
  48                "root=${mmcroot}\0" \
  49        "loadbootscript=" \
  50                "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  51        "bootscript=echo Running bootscript from mmc ...; " \
  52                "source\0" \
  53        "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  54        "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  55        "mmcboot=echo Booting from mmc ...; " \
  56                "run mmcargs; " \
  57                "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  58                        "if run loadfdt; then " \
  59                                "bootz ${loadaddr} - ${fdt_addr}; " \
  60                        "else " \
  61                                "if test ${boot_fdt} = try; then " \
  62                                        "bootz; " \
  63                                "else " \
  64                                        "echo WARN: Cannot load the DT; " \
  65                                "fi; " \
  66                        "fi; " \
  67                "else " \
  68                        "bootz; " \
  69                "fi;\0" \
  70
  71#define CONFIG_BOOTCOMMAND \
  72           "mmc dev ${mmcdev};" \
  73           "mmc dev ${mmcdev}; if mmc rescan; then " \
  74                   "if run loadbootscript; then " \
  75                           "run bootscript; " \
  76                   "else " \
  77                           "if run loadimage; then " \
  78                                   "run mmcboot; " \
  79                           "fi; " \
  80                   "fi; " \
  81           "fi"
  82
  83#define CONFIG_SYS_MEMTEST_START        0x80000000
  84#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x20000000)
  85
  86#define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  87#define CONFIG_SYS_HZ                   1000
  88
  89#define CONFIG_STACKSIZE                SZ_128K
  90
  91/* Physical Memory Map */
  92#define CONFIG_NR_DRAM_BANKS            1
  93#define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  94
  95#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
  96#define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  97#define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  98
  99#define CONFIG_SYS_INIT_SP_OFFSET \
 100        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 101#define CONFIG_SYS_INIT_SP_ADDR \
 102        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 103
 104/* FLASH and environment organization */
 105#define CONFIG_SYS_NO_FLASH
 106#define CONFIG_ENV_SIZE                 SZ_8K
 107#define CONFIG_ENV_IS_IN_MMC
 108
 109#define CONFIG_ENV_OFFSET               (8 * SZ_64K)
 110#define CONFIG_SYS_FSL_USDHC_NUM        1
 111
 112#define CONFIG_SYS_MMC_ENV_DEV          0
 113#define CONFIG_SYS_MMC_ENV_PART         0
 114#define CONFIG_MMCROOT                  "/dev/mmcblk2p2"
 115
 116/* USB Configs */
 117#define CONFIG_USB_EHCI
 118#define CONFIG_USB_EHCI_MX7
 119#define CONFIG_USB_STORAGE
 120#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 121
 122#define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 123#define CONFIG_MXC_USB_FLAGS            0
 124#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
 125
 126#define CONFIG_IMX_THERMAL
 127
 128#define CONFIG_CI_UDC
 129#define CONFIG_USBD_HS
 130#define CONFIG_USB_GADGET_DUALSPEED
 131
 132#define CONFIG_USB_GADGET
 133#define CONFIG_USB_FUNCTION_MASS_STORAGE
 134#define CONFIG_USB_GADGET_DOWNLOAD
 135#define CONFIG_USB_GADGET_VBUS_DRAW     2
 136
 137#define CONFIG_G_DNL_VENDOR_NUM         0x0525
 138#define CONFIG_G_DNL_PRODUCT_NUM        0xa4a5
 139#define CONFIG_G_DNL_MANUFACTURER       "FSL"
 140
 141/* USB Device Firmware Update support */
 142#define CONFIG_USB_FUNCTION_DFU
 143#define CONFIG_DFU_MMC
 144#define CONFIG_SYS_DFU_DATA_BUF_SIZE    SZ_16M
 145#define DFU_DEFAULT_POLL_TIMEOUT        300
 146
 147#endif
 148