LXR uboot/include/miiphy.h

   1/*
   2 * SPDX-License-Identifier:     GPL-2.0 IBM-pibs
   3 *
   4 * Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
   5 */
   6/*----------------------------------------------------------------------------+
   7|
   8|  File Name:   miiphy.h
   9|
  10|  Function:    Include file defining PHY registers.
  11|
  12|  Author:      Mark Wisner
  13|
  14+----------------------------------------------------------------------------*/
  15#ifndef _miiphy_h_
  16#define _miiphy_h_
  17
  18#include <common.h>
  19#include <linux/mii.h>
  20#include <linux/list.h>
  21#include <net.h>
  22#include <phy.h>
  23
  24struct legacy_mii_dev {
  25        int (*read)(const char *devname, unsigned char addr,
  26                     unsigned char reg, unsigned short *value);
  27        int (*write)(const char *devname, unsigned char addr,
  28                      unsigned char reg, unsigned short value);
  29};
  30
  31int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
  32                 unsigned short *value);
  33int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
  34                  unsigned short value);
  35int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
  36                 unsigned char *model, unsigned char *rev);
  37int miiphy_reset(const char *devname, unsigned char addr);
  38int miiphy_speed(const char *devname, unsigned char addr);
  39int miiphy_duplex(const char *devname, unsigned char addr);
  40int miiphy_is_1000base_x(const char *devname, unsigned char addr);
  41#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  42int miiphy_link(const char *devname, unsigned char addr);
  43#endif
  44
  45void miiphy_init(void);
  46
  47void miiphy_register(const char *devname,
  48                      int (*read)(const char *devname, unsigned char addr,
  49                                   unsigned char reg, unsigned short *value),
  50                      int (*write)(const char *devname, unsigned char addr,
  51                                    unsigned char reg, unsigned short value));
  52
  53int miiphy_set_current_dev(const char *devname);
  54const char *miiphy_get_current_dev(void);
  55struct mii_dev *mdio_get_current_dev(void);
  56struct mii_dev *miiphy_get_dev_by_name(const char *devname);
  57struct phy_device *mdio_phydev_for_ethname(const char *devname);
  58
  59void miiphy_listdev(void);
  60
  61struct mii_dev *mdio_alloc(void);
  62void mdio_free(struct mii_dev *bus);
  63int mdio_register(struct mii_dev *bus);
  64int mdio_unregister(struct mii_dev *bus);
  65void mdio_list_devices(void);
  66
  67#ifdef CONFIG_BITBANGMII
  68
  69#define BB_MII_DEVNAME  "bb_miiphy"
  70
  71struct bb_miiphy_bus {
  72        char name[16];
  73        int (*init)(struct bb_miiphy_bus *bus);
  74        int (*mdio_active)(struct bb_miiphy_bus *bus);
  75        int (*mdio_tristate)(struct bb_miiphy_bus *bus);
  76        int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
  77        int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
  78        int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
  79        int (*delay)(struct bb_miiphy_bus *bus);
  80#ifdef CONFIG_BITBANGMII_MULTI
  81        void *priv;
  82#endif
  83};
  84
  85extern struct bb_miiphy_bus bb_miiphy_buses[];
  86extern int bb_miiphy_buses_num;
  87
  88void bb_miiphy_init(void);
  89int bb_miiphy_read(const char *devname, unsigned char addr,
  90                    unsigned char reg, unsigned short *value);
  91int bb_miiphy_write(const char *devname, unsigned char addr,
  92                     unsigned char reg, unsigned short value);
  93#endif
  94
  95/* phy seed setup */
  96#define AUTO                    99
  97#define _1000BASET              1000
  98#define _100BASET               100
  99#define _10BASET                10
 100#define HALF                    22
 101#define FULL                    44
 102
 103/* phy register offsets */
 104#define MII_MIPSCR              0x11
 105
 106/* MII_LPA */
 107#define PHY_ANLPAR_PSB_802_3    0x0001
 108#define PHY_ANLPAR_PSB_802_9    0x0002
 109
 110/* MII_CTRL1000 masks */
 111#define PHY_1000BTCR_1000FD     0x0200
 112#define PHY_1000BTCR_1000HD     0x0100
 113
 114/* MII_STAT1000 masks */
 115#define PHY_1000BTSR_MSCF       0x8000
 116#define PHY_1000BTSR_MSCR       0x4000
 117#define PHY_1000BTSR_LRS        0x2000
 118#define PHY_1000BTSR_RRS        0x1000
 119#define PHY_1000BTSR_1000FD     0x0800
 120#define PHY_1000BTSR_1000HD     0x0400
 121
 122/* phy EXSR */
 123#define ESTATUS_1000XF          0x8000
 124#define ESTATUS_1000XH          0x4000
 125
 126#endif
 127