uboot/drivers/usb/musb-new/musb_dsps.c
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   1/*
   2 * Texas Instruments DSPS platforms "glue layer"
   3 *
   4 * Copyright (C) 2012, by Texas Instruments
   5 *
   6 * Based on the am35x "glue layer" code.
   7 *
   8 * This file is part of the Inventra Controller Driver for Linux.
   9 *
  10 * SPDX-License-Identifier:     GPL-2.0
  11 *
  12 * musb_dsps.c will be a common file for all the TI DSPS platforms
  13 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  14 * For now only ti81x is using this and in future davinci.c, am35x.c
  15 * da8xx.c would be merged to this file after testing.
  16 */
  17
  18#ifndef __UBOOT__
  19#include <linux/init.h>
  20#include <linux/io.h>
  21#include <linux/err.h>
  22#include <linux/platform_device.h>
  23#include <linux/dma-mapping.h>
  24#include <linux/pm_runtime.h>
  25#include <linux/module.h>
  26
  27#include <linux/of.h>
  28#include <linux/of_device.h>
  29#include <linux/of_address.h>
  30
  31#include <plat/usb.h>
  32#else
  33#include <common.h>
  34#include <asm/omap_musb.h>
  35#include "linux-compat.h"
  36#endif
  37
  38#include "musb_core.h"
  39
  40/**
  41 * avoid using musb_readx()/musb_writex() as glue layer should not be
  42 * dependent on musb core layer symbols.
  43 */
  44static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
  45        { return __raw_readb(addr + offset); }
  46
  47static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
  48        { return __raw_readl(addr + offset); }
  49
  50static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
  51        { __raw_writeb(data, addr + offset); }
  52
  53static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
  54        { __raw_writel(data, addr + offset); }
  55
  56/**
  57 * DSPS musb wrapper register offset.
  58 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  59 * musb ips.
  60 */
  61struct dsps_musb_wrapper {
  62        u16     revision;
  63        u16     control;
  64        u16     status;
  65        u16     eoi;
  66        u16     epintr_set;
  67        u16     epintr_clear;
  68        u16     epintr_status;
  69        u16     coreintr_set;
  70        u16     coreintr_clear;
  71        u16     coreintr_status;
  72        u16     phy_utmi;
  73        u16     mode;
  74
  75        /* bit positions for control */
  76        unsigned        reset:5;
  77
  78        /* bit positions for interrupt */
  79        unsigned        usb_shift:5;
  80        u32             usb_mask;
  81        u32             usb_bitmap;
  82        unsigned        drvvbus:5;
  83
  84        unsigned        txep_shift:5;
  85        u32             txep_mask;
  86        u32             txep_bitmap;
  87
  88        unsigned        rxep_shift:5;
  89        u32             rxep_mask;
  90        u32             rxep_bitmap;
  91
  92        /* bit positions for phy_utmi */
  93        unsigned        otg_disable:5;
  94
  95        /* bit positions for mode */
  96        unsigned        iddig:5;
  97        /* miscellaneous stuff */
  98        u32             musb_core_offset;
  99        u8              poll_seconds;
 100};
 101
 102static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
 103        .revision               = 0x00,
 104        .control                = 0x14,
 105        .status                 = 0x18,
 106        .eoi                    = 0x24,
 107        .epintr_set             = 0x38,
 108        .epintr_clear           = 0x40,
 109        .epintr_status          = 0x30,
 110        .coreintr_set           = 0x3c,
 111        .coreintr_clear         = 0x44,
 112        .coreintr_status        = 0x34,
 113        .phy_utmi               = 0xe0,
 114        .mode                   = 0xe8,
 115        .reset                  = 0,
 116        .otg_disable            = 21,
 117        .iddig                  = 8,
 118        .usb_shift              = 0,
 119        .usb_mask               = 0x1ff,
 120        .usb_bitmap             = (0x1ff << 0),
 121        .drvvbus                = 8,
 122        .txep_shift             = 0,
 123        .txep_mask              = 0xffff,
 124        .txep_bitmap            = (0xffff << 0),
 125        .rxep_shift             = 16,
 126        .rxep_mask              = 0xfffe,
 127        .rxep_bitmap            = (0xfffe << 16),
 128        .musb_core_offset       = 0x400,
 129        .poll_seconds           = 2,
 130};
 131
 132/**
 133 * DSPS glue structure.
 134 */
 135struct dsps_glue {
 136        struct device *dev;
 137        struct platform_device *musb;   /* child musb pdev */
 138        const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
 139        struct timer_list timer;        /* otg_workaround timer */
 140};
 141
 142/**
 143 * dsps_musb_enable - enable interrupts
 144 */
 145#ifndef __UBOOT__
 146static void dsps_musb_enable(struct musb *musb)
 147#else
 148static int dsps_musb_enable(struct musb *musb)
 149#endif
 150{
 151#ifndef __UBOOT__
 152        struct device *dev = musb->controller;
 153        struct platform_device *pdev = to_platform_device(dev->parent);
 154        struct dsps_glue *glue = platform_get_drvdata(pdev);
 155        const struct dsps_musb_wrapper *wrp = glue->wrp;
 156#else
 157        const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
 158#endif
 159        void __iomem *reg_base = musb->ctrl_base;
 160        u32 epmask, coremask;
 161
 162        /* Workaround: setup IRQs through both register sets. */
 163        epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
 164               ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
 165        coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
 166
 167        dsps_writel(reg_base, wrp->epintr_set, epmask);
 168        dsps_writel(reg_base, wrp->coreintr_set, coremask);
 169        /* Force the DRVVBUS IRQ so we can start polling for ID change. */
 170#ifndef __UBOOT__
 171        if (is_otg_enabled(musb))
 172                dsps_writel(reg_base, wrp->coreintr_set,
 173                            (1 << wrp->drvvbus) << wrp->usb_shift);
 174#else
 175        return 0;
 176#endif
 177}
 178
 179/**
 180 * dsps_musb_disable - disable HDRC and flush interrupts
 181 */
 182static void dsps_musb_disable(struct musb *musb)
 183{
 184#ifndef __UBOOT__
 185        struct device *dev = musb->controller;
 186        struct platform_device *pdev = to_platform_device(dev->parent);
 187        struct dsps_glue *glue = platform_get_drvdata(pdev);
 188        const struct dsps_musb_wrapper *wrp = glue->wrp;
 189        void __iomem *reg_base = musb->ctrl_base;
 190
 191        dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
 192        dsps_writel(reg_base, wrp->epintr_clear,
 193                         wrp->txep_bitmap | wrp->rxep_bitmap);
 194        dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
 195        dsps_writel(reg_base, wrp->eoi, 0);
 196#endif
 197}
 198
 199#ifndef __UBOOT__
 200static void otg_timer(unsigned long _musb)
 201{
 202        struct musb *musb = (void *)_musb;
 203        void __iomem *mregs = musb->mregs;
 204        struct device *dev = musb->controller;
 205        struct platform_device *pdev = to_platform_device(dev->parent);
 206        struct dsps_glue *glue = platform_get_drvdata(pdev);
 207        const struct dsps_musb_wrapper *wrp = glue->wrp;
 208        u8 devctl;
 209        unsigned long flags;
 210
 211        /*
 212         * We poll because DSPS IP's won't expose several OTG-critical
 213         * status change events (from the transceiver) otherwise.
 214         */
 215        devctl = dsps_readb(mregs, MUSB_DEVCTL);
 216        dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
 217                                otg_state_string(musb->xceiv->state));
 218
 219        spin_lock_irqsave(&musb->lock, flags);
 220        switch (musb->xceiv->state) {
 221        case OTG_STATE_A_WAIT_BCON:
 222                devctl &= ~MUSB_DEVCTL_SESSION;
 223                dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 224
 225                devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
 226                if (devctl & MUSB_DEVCTL_BDEVICE) {
 227                        musb->xceiv->state = OTG_STATE_B_IDLE;
 228                        MUSB_DEV_MODE(musb);
 229                } else {
 230                        musb->xceiv->state = OTG_STATE_A_IDLE;
 231                        MUSB_HST_MODE(musb);
 232                }
 233                break;
 234        case OTG_STATE_A_WAIT_VFALL:
 235                musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 236                dsps_writel(musb->ctrl_base, wrp->coreintr_set,
 237                            MUSB_INTR_VBUSERROR << wrp->usb_shift);
 238                break;
 239        case OTG_STATE_B_IDLE:
 240                if (!is_peripheral_enabled(musb))
 241                        break;
 242
 243                devctl = dsps_readb(mregs, MUSB_DEVCTL);
 244                if (devctl & MUSB_DEVCTL_BDEVICE)
 245                        mod_timer(&glue->timer,
 246                                        jiffies + wrp->poll_seconds * HZ);
 247                else
 248                        musb->xceiv->state = OTG_STATE_A_IDLE;
 249                break;
 250        default:
 251                break;
 252        }
 253        spin_unlock_irqrestore(&musb->lock, flags);
 254}
 255
 256static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
 257{
 258        struct device *dev = musb->controller;
 259        struct platform_device *pdev = to_platform_device(dev->parent);
 260        struct dsps_glue *glue = platform_get_drvdata(pdev);
 261        static unsigned long last_timer;
 262
 263        if (!is_otg_enabled(musb))
 264                return;
 265
 266        if (timeout == 0)
 267                timeout = jiffies + msecs_to_jiffies(3);
 268
 269        /* Never idle if active, or when VBUS timeout is not set as host */
 270        if (musb->is_active || (musb->a_wait_bcon == 0 &&
 271                                musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
 272                dev_dbg(musb->controller, "%s active, deleting timer\n",
 273                                otg_state_string(musb->xceiv->state));
 274                del_timer(&glue->timer);
 275                last_timer = jiffies;
 276                return;
 277        }
 278
 279        if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
 280                dev_dbg(musb->controller,
 281                        "Longer idle timer already pending, ignoring...\n");
 282                return;
 283        }
 284        last_timer = timeout;
 285
 286        dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
 287                otg_state_string(musb->xceiv->state),
 288                        jiffies_to_msecs(timeout - jiffies));
 289        mod_timer(&glue->timer, timeout);
 290}
 291#endif
 292
 293static irqreturn_t dsps_interrupt(int irq, void *hci)
 294{
 295        struct musb  *musb = hci;
 296        void __iomem *reg_base = musb->ctrl_base;
 297#ifndef __UBOOT__
 298        struct device *dev = musb->controller;
 299        struct platform_device *pdev = to_platform_device(dev->parent);
 300        struct dsps_glue *glue = platform_get_drvdata(pdev);
 301        const struct dsps_musb_wrapper *wrp = glue->wrp;
 302#else
 303        const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
 304#endif
 305        unsigned long flags;
 306        irqreturn_t ret = IRQ_NONE;
 307        u32 epintr, usbintr;
 308
 309        spin_lock_irqsave(&musb->lock, flags);
 310
 311        /* Get endpoint interrupts */
 312        epintr = dsps_readl(reg_base, wrp->epintr_status);
 313        musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
 314        musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
 315
 316        if (epintr)
 317                dsps_writel(reg_base, wrp->epintr_status, epintr);
 318
 319        /* Get usb core interrupts */
 320        usbintr = dsps_readl(reg_base, wrp->coreintr_status);
 321        if (!usbintr && !epintr)
 322                goto eoi;
 323
 324        musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
 325        if (usbintr)
 326                dsps_writel(reg_base, wrp->coreintr_status, usbintr);
 327
 328        dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
 329                        usbintr, epintr);
 330#ifndef __UBOOT__
 331        /*
 332         * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
 333         * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
 334         * switch appropriately between halves of the OTG state machine.
 335         * Managing DEVCTL.SESSION per Mentor docs requires that we know its
 336         * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
 337         * Also, DRVVBUS pulses for SRP (but not at 5V) ...
 338         */
 339        if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
 340                pr_info("CAUTION: musb: Babble Interrupt Occured\n");
 341
 342        if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
 343                int drvvbus = dsps_readl(reg_base, wrp->status);
 344                void __iomem *mregs = musb->mregs;
 345                u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
 346                int err;
 347
 348                err = is_host_enabled(musb) && (musb->int_usb &
 349                                                MUSB_INTR_VBUSERROR);
 350                if (err) {
 351                        /*
 352                         * The Mentor core doesn't debounce VBUS as needed
 353                         * to cope with device connect current spikes. This
 354                         * means it's not uncommon for bus-powered devices
 355                         * to get VBUS errors during enumeration.
 356                         *
 357                         * This is a workaround, but newer RTL from Mentor
 358                         * seems to allow a better one: "re"-starting sessions
 359                         * without waiting for VBUS to stop registering in
 360                         * devctl.
 361                         */
 362                        musb->int_usb &= ~MUSB_INTR_VBUSERROR;
 363                        musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
 364                        mod_timer(&glue->timer,
 365                                        jiffies + wrp->poll_seconds * HZ);
 366                        WARNING("VBUS error workaround (delay coming)\n");
 367                } else if (is_host_enabled(musb) && drvvbus) {
 368                        musb->is_active = 1;
 369                        MUSB_HST_MODE(musb);
 370                        musb->xceiv->otg->default_a = 1;
 371                        musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 372                        del_timer(&glue->timer);
 373                } else {
 374                        musb->is_active = 0;
 375                        MUSB_DEV_MODE(musb);
 376                        musb->xceiv->otg->default_a = 0;
 377                        musb->xceiv->state = OTG_STATE_B_IDLE;
 378                }
 379
 380                /* NOTE: this must complete power-on within 100 ms. */
 381                dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
 382                                drvvbus ? "on" : "off",
 383                                otg_state_string(musb->xceiv->state),
 384                                err ? " ERROR" : "",
 385                                devctl);
 386                ret = IRQ_HANDLED;
 387        }
 388#endif
 389
 390        if (musb->int_tx || musb->int_rx || musb->int_usb)
 391                ret |= musb_interrupt(musb);
 392
 393 eoi:
 394        /* EOI needs to be written for the IRQ to be re-asserted. */
 395        if (ret == IRQ_HANDLED || epintr || usbintr)
 396                dsps_writel(reg_base, wrp->eoi, 1);
 397
 398#ifndef __UBOOT__
 399        /* Poll for ID change */
 400        if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
 401                mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
 402#endif
 403
 404        spin_unlock_irqrestore(&musb->lock, flags);
 405
 406        return ret;
 407}
 408
 409static int dsps_musb_init(struct musb *musb)
 410{
 411#ifndef __UBOOT__
 412        struct device *dev = musb->controller;
 413        struct musb_hdrc_platform_data *plat = dev->platform_data;
 414        struct platform_device *pdev = to_platform_device(dev->parent);
 415        struct dsps_glue *glue = platform_get_drvdata(pdev);
 416        const struct dsps_musb_wrapper *wrp = glue->wrp;
 417        struct omap_musb_board_data *data = plat->board_data;
 418#else
 419        struct omap_musb_board_data *data =
 420                        (struct omap_musb_board_data *)musb->controller;
 421        const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
 422#endif
 423        void __iomem *reg_base = musb->ctrl_base;
 424        u32 rev, val;
 425        int status;
 426
 427        /* mentor core register starts at offset of 0x400 from musb base */
 428        musb->mregs += wrp->musb_core_offset;
 429
 430#ifndef __UBOOT__
 431        /* NOP driver needs change if supporting dual instance */
 432        usb_nop_xceiv_register();
 433        musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
 434        if (IS_ERR_OR_NULL(musb->xceiv))
 435                return -ENODEV;
 436#endif
 437
 438        /* Returns zero if e.g. not clocked */
 439        rev = dsps_readl(reg_base, wrp->revision);
 440        if (!rev) {
 441                status = -ENODEV;
 442                goto err0;
 443        }
 444
 445#ifndef __UBOOT__
 446        if (is_host_enabled(musb))
 447                setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
 448#endif
 449
 450        /* Reset the musb */
 451        dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
 452
 453        /* Start the on-chip PHY and its PLL. */
 454        if (data->set_phy_power)
 455                data->set_phy_power(data->dev, 1);
 456
 457        musb->isr = dsps_interrupt;
 458
 459        /* reset the otgdisable bit, needed for host mode to work */
 460        val = dsps_readl(reg_base, wrp->phy_utmi);
 461        val &= ~(1 << wrp->otg_disable);
 462        dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
 463
 464        /* clear level interrupt */
 465        dsps_writel(reg_base, wrp->eoi, 0);
 466
 467        return 0;
 468err0:
 469#ifndef __UBOOT__
 470        usb_put_phy(musb->xceiv);
 471        usb_nop_xceiv_unregister();
 472#endif
 473        return status;
 474}
 475
 476static int dsps_musb_exit(struct musb *musb)
 477{
 478#ifndef __UBOOT__
 479        struct device *dev = musb->controller;
 480        struct musb_hdrc_platform_data *plat = dev->platform_data;
 481        struct omap_musb_board_data *data = plat->board_data;
 482        struct platform_device *pdev = to_platform_device(dev->parent);
 483        struct dsps_glue *glue = platform_get_drvdata(pdev);
 484#else
 485        struct omap_musb_board_data *data =
 486                        (struct omap_musb_board_data *)musb->controller;
 487#endif
 488
 489#ifndef __UBOOT__
 490        if (is_host_enabled(musb))
 491                del_timer_sync(&glue->timer);
 492#endif
 493
 494        /* Shutdown the on-chip PHY and its PLL. */
 495        if (data->set_phy_power)
 496                data->set_phy_power(data->dev, 0);
 497
 498#ifndef __UBOOT__
 499        /* NOP driver needs change if supporting dual instance */
 500        usb_put_phy(musb->xceiv);
 501        usb_nop_xceiv_unregister();
 502#endif
 503
 504        return 0;
 505}
 506
 507#ifndef __UBOOT__
 508static struct musb_platform_ops dsps_ops = {
 509#else
 510struct musb_platform_ops musb_dsps_ops = {
 511#endif
 512        .init           = dsps_musb_init,
 513        .exit           = dsps_musb_exit,
 514
 515        .enable         = dsps_musb_enable,
 516        .disable        = dsps_musb_disable,
 517
 518#ifndef __UBOOT__
 519        .try_idle       = dsps_musb_try_idle,
 520#endif
 521};
 522
 523#ifndef __UBOOT__
 524static u64 musb_dmamask = DMA_BIT_MASK(32);
 525#endif
 526
 527#ifndef __UBOOT__
 528static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
 529{
 530        struct device *dev = glue->dev;
 531        struct platform_device *pdev = to_platform_device(dev);
 532        struct musb_hdrc_platform_data  *pdata = dev->platform_data;
 533        struct platform_device  *musb;
 534        struct resource *res;
 535        struct resource resources[2];
 536        char res_name[10];
 537        int ret;
 538
 539        /* get memory resource */
 540        sprintf(res_name, "musb%d", id);
 541        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
 542        if (!res) {
 543                dev_err(dev, "%s get mem resource failed\n", res_name);
 544                ret = -ENODEV;
 545                goto err0;
 546        }
 547        res->parent = NULL;
 548        resources[0] = *res;
 549
 550        /* get irq resource */
 551        sprintf(res_name, "musb%d-irq", id);
 552        res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
 553        if (!res) {
 554                dev_err(dev, "%s get irq resource failed\n", res_name);
 555                ret = -ENODEV;
 556                goto err0;
 557        }
 558        res->parent = NULL;
 559        resources[1] = *res;
 560        resources[1].name = "mc";
 561
 562        /* allocate the child platform device */
 563        musb = platform_device_alloc("musb-hdrc", -1);
 564        if (!musb) {
 565                dev_err(dev, "failed to allocate musb device\n");
 566                ret = -ENOMEM;
 567                goto err0;
 568        }
 569
 570        musb->dev.parent                = dev;
 571        musb->dev.dma_mask              = &musb_dmamask;
 572        musb->dev.coherent_dma_mask     = musb_dmamask;
 573
 574        glue->musb                      = musb;
 575
 576        pdata->platform_ops             = &dsps_ops;
 577
 578        ret = platform_device_add_resources(musb, resources, 2);
 579        if (ret) {
 580                dev_err(dev, "failed to add resources\n");
 581                goto err1;
 582        }
 583
 584        ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
 585        if (ret) {
 586                dev_err(dev, "failed to add platform_data\n");
 587                goto err1;
 588        }
 589
 590        ret = platform_device_add(musb);
 591        if (ret) {
 592                dev_err(dev, "failed to register musb device\n");
 593                goto err1;
 594        }
 595
 596        return 0;
 597
 598err1:
 599        platform_device_put(musb);
 600err0:
 601        return ret;
 602}
 603
 604static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
 605{
 606        platform_device_del(glue->musb);
 607        platform_device_put(glue->musb);
 608}
 609
 610static int __devinit dsps_probe(struct platform_device *pdev)
 611{
 612        const struct platform_device_id *id = platform_get_device_id(pdev);
 613        const struct dsps_musb_wrapper *wrp =
 614                                (struct dsps_musb_wrapper *)id->driver_data;
 615        struct dsps_glue *glue;
 616        struct resource *iomem;
 617        int ret;
 618
 619        /* allocate glue */
 620        glue = kzalloc(sizeof(*glue), GFP_KERNEL);
 621        if (!glue) {
 622                dev_err(&pdev->dev, "unable to allocate glue memory\n");
 623                ret = -ENOMEM;
 624                goto err0;
 625        }
 626
 627        /* get memory resource */
 628        iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 629        if (!iomem) {
 630                dev_err(&pdev->dev, "failed to get usbss mem resource\n");
 631                ret = -ENODEV;
 632                goto err1;
 633        }
 634
 635        glue->dev = &pdev->dev;
 636
 637        glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
 638        if (!glue->wrp) {
 639                dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
 640                ret = -ENOMEM;
 641                goto err1;
 642        }
 643        platform_set_drvdata(pdev, glue);
 644
 645        /* enable the usbss clocks */
 646        pm_runtime_enable(&pdev->dev);
 647
 648        ret = pm_runtime_get_sync(&pdev->dev);
 649        if (ret < 0) {
 650                dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
 651                goto err2;
 652        }
 653
 654        /* create the child platform device for first instances of musb */
 655        ret = dsps_create_musb_pdev(glue, 0);
 656        if (ret != 0) {
 657                dev_err(&pdev->dev, "failed to create child pdev\n");
 658                goto err3;
 659        }
 660
 661        return 0;
 662
 663err3:
 664        pm_runtime_put(&pdev->dev);
 665err2:
 666        pm_runtime_disable(&pdev->dev);
 667        kfree(glue->wrp);
 668err1:
 669        kfree(glue);
 670err0:
 671        return ret;
 672}
 673static int __devexit dsps_remove(struct platform_device *pdev)
 674{
 675        struct dsps_glue *glue = platform_get_drvdata(pdev);
 676
 677        /* delete the child platform device */
 678        dsps_delete_musb_pdev(glue);
 679
 680        /* disable usbss clocks */
 681        pm_runtime_put(&pdev->dev);
 682        pm_runtime_disable(&pdev->dev);
 683        kfree(glue->wrp);
 684        kfree(glue);
 685        return 0;
 686}
 687
 688#ifdef CONFIG_PM_SLEEP
 689static int dsps_suspend(struct device *dev)
 690{
 691        struct musb_hdrc_platform_data *plat = dev->platform_data;
 692        struct omap_musb_board_data *data = plat->board_data;
 693
 694        /* Shutdown the on-chip PHY and its PLL. */
 695        if (data->set_phy_power)
 696                data->set_phy_power(data->dev, 0);
 697
 698        return 0;
 699}
 700
 701static int dsps_resume(struct device *dev)
 702{
 703        struct musb_hdrc_platform_data *plat = dev->platform_data;
 704        struct omap_musb_board_data *data = plat->board_data;
 705
 706        /* Start the on-chip PHY and its PLL. */
 707        if (data->set_phy_power)
 708                data->set_phy_power(data->dev, 1);
 709
 710        return 0;
 711}
 712#endif
 713
 714static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
 715#endif
 716
 717#ifndef __UBOOT__
 718static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
 719        {
 720                .name   = "musb-ti81xx",
 721                .driver_data    = (kernel_ulong_t) &ti81xx_driver_data,
 722        },
 723        {  },   /* Terminating Entry */
 724};
 725MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
 726
 727static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
 728        { .compatible = "musb-ti81xx", },
 729        { .compatible = "ti,ti81xx-musb", },
 730        { .compatible = "ti,am335x-musb", },
 731        {  },
 732};
 733MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
 734
 735static struct platform_driver dsps_usbss_driver = {
 736        .probe          = dsps_probe,
 737        .remove         = __devexit_p(dsps_remove),
 738        .driver         = {
 739                .name   = "musb-dsps",
 740                .pm     = &dsps_pm_ops,
 741                .of_match_table = musb_dsps_of_match,
 742        },
 743        .id_table       = musb_dsps_id_table,
 744};
 745
 746MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
 747MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
 748MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
 749MODULE_LICENSE("GPL v2");
 750
 751static int __init dsps_init(void)
 752{
 753        return platform_driver_register(&dsps_usbss_driver);
 754}
 755subsys_initcall(dsps_init);
 756
 757static void __exit dsps_exit(void)
 758{
 759        platform_driver_unregister(&dsps_usbss_driver);
 760}
 761module_exit(dsps_exit);
 762#endif
 763