1/* 2 * U-Boot - Configuration file for BF526 EZBrd board 3 */ 4 5#ifndef __CONFIG_BF526_EZBRD_H__ 6#define __CONFIG_BF526_EZBRD_H__ 7 8#include <asm/config-pre.h> 9 10/* 11 * Processor Settings 12 */ 13#define CONFIG_BFIN_CPU bf526-0.0 14#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA 15 16/* 17 * Clock Settings 18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 20 */ 21/* CONFIG_CLKIN_HZ is any value in Hz */ 22#define CONFIG_CLKIN_HZ 25000000 23/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 24/* 1 = CLKIN / 2 */ 25#define CONFIG_CLKIN_HALF 0 26/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 27/* 1 = bypass PLL */ 28#define CONFIG_PLL_BYPASS 0 29/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 30/* Values can range from 0-63 (where 0 means 64) */ 31#define CONFIG_VCO_MULT 16 32/* CCLK_DIV controls the core clock divider */ 33/* Values can be 1, 2, 4, or 8 ONLY */ 34#define CONFIG_CCLK_DIV 1 35/* SCLK_DIV controls the system clock divider */ 36/* Values can range from 1-15 */ 37#define CONFIG_SCLK_DIV 5 38 39/* 40 * Memory Settings 41 */ 42/* This board has a 64meg MT48H32M16 */ 43#define CONFIG_MEM_ADD_WDTH 10 44#define CONFIG_MEM_SIZE 64 45 46#define CONFIG_EBIU_SDRRC_VAL 0x0267 47#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_2 | PASR_ALL | TRAS_6 | TRP_4 | TRCD_2 | TWR_2 | PSS) 48 49#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) 50#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) 51#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) 52 53#define CONFIG_SYS_MONITOR_LEN (768 * 1024) 54#define CONFIG_SYS_MALLOC_LEN (512 * 1024) 55 56/* 57 * NAND Settings 58 * (can't be used same time as ethernet) 59 */ 60#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) 61# define CONFIG_BFIN_NFC 62# define CONFIG_BFIN_NFC_BOOTROM_ECC 63#endif 64#ifdef CONFIG_BFIN_NFC 65#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 66#define CONFIG_DRIVER_NAND_BFIN 67#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ 68#define CONFIG_SYS_MAX_NAND_DEVICE 1 69#define CONFIG_CMD_NAND 70#endif 71 72/* 73 * Network Settings 74 */ 75#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ 76 !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) 77#define ADI_CMDS_NETWORK 1 78#define CONFIG_BFIN_MAC 79#define CONFIG_RMII 80#define CONFIG_NETCONSOLE 1 81#endif 82#define CONFIG_HOSTNAME bf526-ezbrd 83 84/* 85 * Flash Settings 86 */ 87#define CONFIG_FLASH_CFI_DRIVER 88#define CONFIG_SYS_FLASH_BASE 0x20000000 89#define CONFIG_SYS_FLASH_CFI 90#define CONFIG_SYS_FLASH_PROTECTION 91#define CONFIG_SYS_MAX_FLASH_BANKS 1 92#define CONFIG_SYS_MAX_FLASH_SECT 71 93 94/* 95 * SPI Settings 96 */ 97#define CONFIG_BFIN_SPI 98#define CONFIG_ENV_SPI_MAX_HZ 30000000 99#define CONFIG_SF_DEFAULT_SPEED 30000000 100 101/* 102 * Env Storage Settings 103 */ 104#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) 105#define CONFIG_ENV_IS_IN_SPI_FLASH 106#define CONFIG_ENV_OFFSET 0x4000 107#define CONFIG_ENV_SIZE 0x2000 108#define CONFIG_ENV_SECT_SIZE 0x2000 109#else 110#define CONFIG_ENV_IS_IN_FLASH 111#define CONFIG_ENV_OFFSET 0x4000 112#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 113#define CONFIG_ENV_SIZE 0x2000 114#define CONFIG_ENV_SECT_SIZE 0x2000 115#endif 116#define CONFIG_ENV_IS_EMBEDDED_IN_LDR 117 118/* 119 * I2C Settings 120 */ 121#define CONFIG_SYS_I2C 122#define CONFIG_SYS_I2C_ADI 123 124/* 125 * USB Settings 126 */ 127#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) 128#define CONFIG_USB_MUSB_HCD 129#define CONFIG_USB_BLACKFIN 130#define CONFIG_USB_MUSB_TIMEOUT 100000 131#endif 132 133/* 134 * Misc Settings 135 */ 136#define CONFIG_MISC_INIT_R 137#define CONFIG_RTC_BFIN 138#define CONFIG_UART_CONSOLE 1 139 140/* define to enable run status via led */ 141/* #define CONFIG_STATUS_LED */ 142#ifdef CONFIG_STATUS_LED 143#define CONFIG_GPIO_LED 144#define CONFIG_BOARD_SPECIFIC_LED 145/* use LED0 to indicate booting/alive */ 146#define STATUS_LED_BOOT 0 147#define STATUS_LED_BIT GPIO_PF8 148#define STATUS_LED_STATE STATUS_LED_ON 149#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4) 150/* use LED1 to indicate crash */ 151#define STATUS_LED_CRASH 1 152#define STATUS_LED_BIT1 GPIO_PG11 153#define STATUS_LED_STATE1 STATUS_LED_ON 154#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 155/* #define STATUS_LED_BIT2 GPIO_PG12 */ 156#endif 157 158/* 159 * Pull in common ADI header for remaining command/environment setup 160 */ 161#include <configs/bfin_adi_common.h> 162 163#endif 164