uboot/include/configs/canmb.h
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   1/*
   2 * (C) Copyright 2005
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#ifndef __CONFIG_H
   9#define __CONFIG_H
  10
  11/*
  12 * High Level Configuration Options
  13 * (easy to change)
  14 */
  15
  16#define CONFIG_MPC5200          1       /* This is a MPC5200 CPU */
  17#define CONFIG_CANMB            1       /* ... on canmb board - we need this for FEC.C */
  18
  19/*
  20 * allowed and functional CONFIG_SYS_TEXT_BASE values:
  21 * 0xfe000000   low boot at 0x00000100 (default board setting)
  22 * 0x00100000   RAM load and test
  23 */
  24#define CONFIG_SYS_TEXT_BASE    0xFE000000
  25
  26#define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  27
  28#define CONFIG_BOARD_EARLY_INIT_R
  29
  30#define CONFIG_HIGH_BATS        1       /* High BATs supported */
  31
  32/*
  33 * Serial console configuration
  34 */
  35#define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  36#define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  37#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  38
  39/*
  40 * BOOTP options
  41 */
  42#define CONFIG_BOOTP_BOOTFILESIZE
  43#define CONFIG_BOOTP_BOOTPATH
  44#define CONFIG_BOOTP_GATEWAY
  45#define CONFIG_BOOTP_HOSTNAME
  46
  47/*
  48 * Command line configuration.
  49 */
  50#define CONFIG_CMD_DATE
  51#define CONFIG_CMD_IMMAP
  52#define CONFIG_CMD_REGINFO
  53
  54/*
  55 * MUST be low boot - HIGHBOOT is not supported anymore
  56 */
  57#if (CONFIG_SYS_TEXT_BASE == 0xFE000000)                /* Boot low with 32 MB Flash */
  58#   define CONFIG_SYS_LOWBOOT           1
  59#   define CONFIG_SYS_LOWBOOT16 1
  60#else
  61#   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
  62#endif
  63
  64/*
  65 * Autobooting
  66 */
  67
  68#define CONFIG_PREBOOT  "echo;" \
  69        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  70        "echo"
  71
  72#undef  CONFIG_BOOTARGS
  73
  74#define CONFIG_EXTRA_ENV_SETTINGS                                       \
  75        "netdev=eth0\0"                                                 \
  76        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  77                "nfsroot=${serverip}:${rootpath}\0"                     \
  78        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
  79        "addip=setenv bootargs ${bootargs} "                            \
  80                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
  81                ":${hostname}:${netdev}:off panic=1\0"                  \
  82        "flash_nfs=run nfsargs addip;"                                  \
  83                "bootm ${kernel_addr}\0"                                \
  84        "flash_self=run ramargs addip;"                                 \
  85                "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
  86        "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
  87        "rootpath=/opt/eldk/ppc_6xx\0"                                  \
  88        "bootfile=/tftpboot/canmb/uImage\0"                             \
  89        ""
  90
  91#define CONFIG_BOOTCOMMAND      "run flash_self"
  92
  93/*
  94 * IPB Bus clocking configuration.
  95 */
  96#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK          /* define for 133MHz speed */
  97
  98/*
  99 * Flash configuration, expect one 16 Megabyte Bank at most
 100 */
 101#define CONFIG_SYS_FLASH_BASE           0xFE000000
 102#define CONFIG_SYS_FLASH_SIZE           0x02000000
 103#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks      */
 104#define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sects on one chip */
 105
 106#define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Flash Erase Timeout (in ms)  */
 107#define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (in ms)  */
 108
 109#define CONFIG_FLASH_CFI_DRIVER
 110#define CONFIG_SYS_FLASH_CFI
 111#define CONFIG_SYS_FLASH_EMPTY_INFO
 112
 113/*
 114 * Environment settings
 115 */
 116#define CONFIG_ENV_IS_IN_FLASH  1
 117#define CONFIG_ENV_OFFSET               (2*128*1024)
 118#define CONFIG_ENV_SIZE         0x2000
 119#define CONFIG_ENV_SECT_SIZE       (128*1024)
 120
 121/*
 122 * Memory map
 123 *
 124 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
 125 */
 126#define CONFIG_SYS_MBAR                 0xf0000000      /* DO NOT CHANGE this */
 127#define CONFIG_SYS_SDRAM_BASE           0x00000000
 128#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 129
 130/* Use SRAM until RAM will be available */
 131#define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 132#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 133
 134#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 135#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 136
 137#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 138#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 139#   define CONFIG_SYS_RAMBOOT           1
 140#endif
 141
 142#define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor   */
 143#define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc()  */
 144#define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 145
 146/*
 147 * Ethernet configuration
 148 */
 149#define CONFIG_MPC5xxx_FEC      1
 150#define CONFIG_MPC5xxx_FEC_MII100
 151#define CONFIG_PHY_ADDR         0x0
 152/*
 153 * GPIO configuration:
 154 * PSC1,2,3 predefined as UART
 155 * PCI disabled
 156 * Ethernet 100 with MD
 157 */
 158#define CONFIG_SYS_GPS_PORT_CONFIG      0x00058444
 159
 160/*
 161 * Miscellaneous configurable options
 162 */
 163#define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 164#if defined(CONFIG_CMD_KGDB)
 165#  define CONFIG_SYS_CBSIZE             1024    /* Console I/O Buffer Size  */
 166#else
 167#  define CONFIG_SYS_CBSIZE             256     /* Console I/O Buffer Size  */
 168#endif
 169#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 170#define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 171#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 172
 173#define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 174#define CONFIG_SYS_MEMTEST_END          0x01f00000      /* 1 ... 31 MB in DRAM  */
 175
 176#define CONFIG_SYS_LOAD_ADDR            0x200000        /* default load address */
 177
 178#define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 179
 180#define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 181#if defined(CONFIG_CMD_KGDB)
 182#  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 183#endif
 184
 185/*
 186 * Various low-level settings
 187 */
 188#define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 189#define CONFIG_SYS_HID0_FINAL           HID0_ICE
 190
 191#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 192#define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 193#define CONFIG_SYS_BOOTCS_CFG           0x00047D01
 194#define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 195#define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 196
 197#define CONFIG_SYS_CS_BURST             0x00000000
 198#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 199
 200#define CONFIG_SYS_RESET_ADDRESS        0x7f000000
 201
 202#endif /* __CONFIG_H */
 203