LXR uboot/include/configs/tricorder.h

   1/*
   2 * (C) Copyright 2006-2008
   3 * Texas Instruments.
   4 * Richard Woodruff <r-woodruff2@ti.com>
   5 * Syed Mohammed Khasim <x0khasim@ti.com>
   6 *
   7 * (C) Copyright 2012
   8 * Corscience GmbH & Co. KG
   9 * Thomas Weber <weber@corscience.de>
  10 *
  11 * Configuration settings for the Tricorder board.
  12 *
  13 * SPDX-License-Identifier:     GPL-2.0+
  14 */
  15
  16#ifndef __CONFIG_H
  17#define __CONFIG_H
  18
  19/* High Level Configuration Options */
  20#define CONFIG_SYS_THUMB_BUILD
  21#define CONFIG_OMAP                     /* in a TI OMAP core */
  22/* Common ARM Erratas */
  23#define CONFIG_ARM_ERRATA_454179
  24#define CONFIG_ARM_ERRATA_430973
  25#define CONFIG_ARM_ERRATA_621766
  26
  27#define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
  28/*
  29 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  30 * 64 bytes before this address should be set aside for u-boot.img's
  31 * header. That is 0x800FFFC0--0x80100000 should not be used for any
  32 * other needs.
  33 */
  34#define CONFIG_SYS_TEXT_BASE            0x80100000
  35
  36#define CONFIG_SDRC                     /* The chip has SDRC controller */
  37
  38#include <asm/arch/cpu.h>               /* get chip and board defs */
  39#include <asm/arch/omap.h>
  40
  41/* Clock Defines */
  42#define V_OSCK                          26000000 /* Clock output from T2 */
  43#define V_SCLK                          (V_OSCK >> 1)
  44
  45#define CONFIG_MISC_INIT_R
  46
  47#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  48#define CONFIG_SETUP_MEMORY_TAGS
  49#define CONFIG_INITRD_TAG
  50#define CONFIG_REVISION_TAG
  51
  52/* Size of malloc() pool */
  53#define CONFIG_SYS_MALLOC_LEN           (1024*1024)
  54
  55/* Hardware drivers */
  56
  57/* GPIO support */
  58#define CONFIG_OMAP_GPIO
  59
  60/* GPIO banks */
  61#define CONFIG_OMAP3_GPIO_2             /* GPIO32..63 are in GPIO bank 2 */
  62
  63/* LED support */
  64#define CONFIG_STATUS_LED
  65#define CONFIG_BOARD_SPECIFIC_LED
  66#define CONFIG_CMD_LED                  /* LED command */
  67#define STATUS_LED_BIT                  (1 << 0)
  68#define STATUS_LED_STATE                STATUS_LED_ON
  69#define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
  70#define STATUS_LED_BIT1                 (1 << 1)
  71#define STATUS_LED_STATE1               STATUS_LED_ON
  72#define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
  73#define STATUS_LED_BIT2                 (1 << 2)
  74#define STATUS_LED_STATE2               STATUS_LED_ON
  75#define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 2)
  76
  77/* NS16550 Configuration */
  78#define CONFIG_SYS_NS16550_SERIAL
  79#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  80#define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
  81
  82/* select serial console configuration */
  83#define CONFIG_CONS_INDEX               3
  84#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  85#define CONFIG_SERIAL3                  3
  86#define CONFIG_BAUDRATE                 115200
  87#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  88                                        115200}
  89
  90/* MMC */
  91#define CONFIG_GENERIC_MMC
  92#define CONFIG_OMAP_HSMMC
  93#define CONFIG_DOS_PARTITION
  94
  95/* I2C */
  96#define CONFIG_SYS_I2C
  97#define CONFIG_SYS_OMAP24_I2C_SPEED     100000
  98#define CONFIG_SYS_OMAP24_I2C_SLAVE     1
  99#define CONFIG_SYS_I2C_OMAP34XX
 100 
 101
 102/* EEPROM */
 103#define CONFIG_CMD_EEPROM
 104#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
 105#define CONFIG_SYS_EEPROM_BUS_NUM       1
 106
 107/* TWL4030 */
 108#define CONFIG_TWL4030_POWER
 109#define CONFIG_TWL4030_LED
 110
 111/* Board NAND Info */
 112#define CONFIG_SYS_NO_FLASH             /* no NOR flash */
 113#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 114#define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
 115#define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
 116                                                "128k(SPL)," \
 117                                                "1m(u-boot)," \
 118                                                "384k(u-boot-env1)," \
 119                                                "1152k(mtdoops)," \
 120                                                "384k(u-boot-env2)," \
 121                                                "5m(kernel)," \
 122                                                "2m(fdt)," \
 123                                                "-(ubi)"
 124
 125#define CONFIG_NAND_OMAP_GPMC
 126#define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 127                                                        /* to access nand */
 128#define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 129                                                        /* to access nand at */
 130                                                        /* CS0 */
 131#define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 132                                                        /* devices */
 133#define CONFIG_BCH
 134#define CONFIG_SYS_NAND_MAX_OOBFREE     2
 135#define CONFIG_SYS_NAND_MAX_ECCPOS      56
 136
 137/* commands to include */
 138#define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
 139#define CONFIG_CMD_NAND                 /* NAND support */
 140#define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
 141#define CONFIG_CMD_UBIFS                /* UBIFS commands */
 142#define CONFIG_LZO                      /* LZO is needed for UBIFS */
 143
 144#undef CONFIG_CMD_JFFS2                 /* JFFS2 Support */
 145
 146/* needed for ubi */
 147#define CONFIG_RBTREE
 148#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 149#define CONFIG_MTD_PARTITIONS
 150
 151/* Environment information (this is the common part) */
 152
 153
 154/* hang() the board on panic() */
 155#define CONFIG_PANIC_HANG
 156
 157/* environment placement (for NAND), is different for FLASHCARD but does not
 158 * harm there */
 159#define CONFIG_ENV_OFFSET               0x120000    /* env start */
 160#define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
 161#define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
 162#define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
 163
 164/* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
 165 * value can not be used here! */
 166#define CONFIG_LOADADDR         0x82000000
 167
 168#define CONFIG_COMMON_ENV_SETTINGS \
 169        "console=ttyO2,115200n8\0" \
 170        "mmcdev=0\0" \
 171        "vram=3M\0" \
 172        "defaultdisplay=lcd\0" \
 173        "kernelopts=mtdoops.mtddev=3\0" \
 174        "mtdparts=" MTDPARTS_DEFAULT "\0" \
 175        "mtdids=" MTDIDS_DEFAULT "\0" \
 176        "commonargs=" \
 177                "setenv bootargs console=${console} " \
 178                "${mtdparts} " \
 179                "${kernelopts} " \
 180                "vt.global_cursor_default=0 " \
 181                "vram=${vram} " \
 182                "omapdss.def_disp=${defaultdisplay}\0"
 183
 184#define CONFIG_BOOTCOMMAND "run autoboot"
 185
 186/* specific environment settings for different use cases
 187 * FLASHCARD: used to run a rdimage from sdcard to program the device
 188 * 'NORMAL': used to boot kernel from sdcard, nand, ...
 189 *
 190 * The main aim for the FLASHCARD skin is to have an embedded environment
 191 * which will not be influenced by any data already on the device.
 192 */
 193#ifdef CONFIG_FLASHCARD
 194
 195#define CONFIG_ENV_IS_NOWHERE
 196
 197/* the rdaddr is 16 MiB before the loadaddr */
 198#define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
 199
 200#define CONFIG_EXTRA_ENV_SETTINGS \
 201        CONFIG_COMMON_ENV_SETTINGS \
 202        CONFIG_ENV_RDADDR \
 203        "autoboot=" \
 204        "run commonargs; " \
 205        "setenv bootargs ${bootargs} " \
 206                "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
 207                "rdinit=/sbin/init; " \
 208        "mmc dev ${mmcdev}; mmc rescan; " \
 209        "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
 210        "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
 211        "bootm ${loadaddr} ${rdaddr}\0"
 212
 213#else /* CONFIG_FLASHCARD */
 214
 215#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
 216
 217#define CONFIG_ENV_IS_IN_NAND
 218
 219#define CONFIG_EXTRA_ENV_SETTINGS \
 220        CONFIG_COMMON_ENV_SETTINGS \
 221        "mmcargs=" \
 222                "run commonargs; " \
 223                "setenv bootargs ${bootargs} " \
 224                "root=/dev/mmcblk0p2 " \
 225                "rootwait " \
 226                "rw\0" \
 227        "nandargs=" \
 228                "run commonargs; " \
 229                "setenv bootargs ${bootargs} " \
 230                "root=ubi0:root " \
 231                "ubi.mtd=7 " \
 232                "rootfstype=ubifs " \
 233                "ro\0" \
 234        "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 235        "bootscript=echo Running bootscript from mmc ...; " \
 236                "source ${loadaddr}\0" \
 237        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 238        "mmcboot=echo Booting from mmc ...; " \
 239                "run mmcargs; " \
 240                "bootm ${loadaddr}\0" \
 241        "loaduimage_ubi=ubi part ubi; " \
 242                "ubifsmount ubi:root; " \
 243                "ubifsload ${loadaddr} /boot/uImage\0" \
 244        "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
 245        "nandboot=echo Booting from nand ...; " \
 246                "run nandargs; " \
 247                "run loaduimage_nand; " \
 248                "bootm ${loadaddr}\0" \
 249        "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
 250                        "if run loadbootscript; then " \
 251                                "run bootscript; " \
 252                        "else " \
 253                                "if run loaduimage; then " \
 254                                        "run mmcboot; " \
 255                                "else run nandboot; " \
 256                                "fi; " \
 257                        "fi; " \
 258                "else run nandboot; fi\0"
 259
 260#endif /* CONFIG_FLASHCARD */
 261
 262/* Miscellaneous configurable options */
 263#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 264#define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
 265#define CONFIG_AUTO_COMPLETE
 266#define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 267/* Print Buffer Size */
 268#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 269                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 270#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 271
 272/* Boot Argument Buffer Size */
 273#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 274
 275#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x00000000)
 276#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 277                                        0x07000000) /* 112 MB */
 278
 279#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
 280
 281/*
 282 * OMAP3 has 12 GP timers, they can be driven by the system clock
 283 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 284 * This rate is divided by a local divisor.
 285 */
 286#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 287#define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
 288
 289/*  Physical Memory Map  */
 290#define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
 291#define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 292#define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 293
 294/* NAND and environment organization  */
 295#define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 296
 297#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 298#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 299#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 300#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 301                                                CONFIG_SYS_INIT_RAM_SIZE - \
 302                                                GENERATED_GBL_DATA_SIZE)
 303
 304/* SRAM config */
 305#define CONFIG_SYS_SRAM_START           0x40200000
 306#define CONFIG_SYS_SRAM_SIZE            0x10000
 307
 308/* Defines for SPL */
 309#define CONFIG_SPL_FRAMEWORK
 310#define CONFIG_SPL_NAND_SIMPLE
 311
 312#define CONFIG_SPL_BOARD_INIT
 313#define CONFIG_SPL_NAND_BASE
 314#define CONFIG_SPL_NAND_DRIVERS
 315#define CONFIG_SPL_NAND_ECC
 316#define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 317#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
 318#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
 319
 320#define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 321#define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 322                                         CONFIG_SPL_TEXT_BASE)
 323
 324#define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
 325#define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 326
 327/* NAND boot config */
 328#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 329#define CONFIG_SYS_NAND_PAGE_COUNT      64
 330#define CONFIG_SYS_NAND_PAGE_SIZE       2048
 331#define CONFIG_SYS_NAND_OOBSIZE         64
 332#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 333#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 334#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
 335                                         13, 14, 16, 17, 18, 19, 20, 21, 22, \
 336                                         23, 24, 25, 26, 27, 28, 30, 31, 32, \
 337                                         33, 34, 35, 36, 37, 38, 39, 40, 41, \
 338                                         42, 44, 45, 46, 47, 48, 49, 50, 51, \
 339                                         52, 53, 54, 55, 56}
 340
 341#define CONFIG_SYS_NAND_ECCSIZE         512
 342#define CONFIG_SYS_NAND_ECCBYTES        13
 343#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 344
 345#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 346
 347#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 348#define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
 349
 350#define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 351#define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
 352
 353#define CONFIG_SYS_ALT_MEMTEST
 354#define CONFIG_SYS_MEMTEST_SCRATCH      0x81000000
 355#endif /* __CONFIG_H */
 356