1/* 2 * linux/include/asm-arm/proc-armv/ptrace.h 3 * 4 * Copyright (C) 1996-1999 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#ifndef __ASM_PROC_PTRACE_H 11#define __ASM_PROC_PTRACE_H 12 13#ifdef CONFIG_ARM64 14 15#define PCMASK 0 16 17#ifndef __ASSEMBLY__ 18 19/* 20 * This struct defines the way the registers are stored 21 * on the stack during an exception. 22 */ 23struct pt_regs { 24 unsigned long elr; 25 unsigned long regs[31]; 26}; 27 28#endif /* __ASSEMBLY__ */ 29 30#else /* CONFIG_ARM64 */ 31 32#define USR26_MODE 0x00 33#define FIQ26_MODE 0x01 34#define IRQ26_MODE 0x02 35#define SVC26_MODE 0x03 36#define USR_MODE 0x10 37#define FIQ_MODE 0x11 38#define IRQ_MODE 0x12 39#define SVC_MODE 0x13 40#define ABT_MODE 0x17 41#define HYP_MODE 0x1a 42#define UND_MODE 0x1b 43#define SYSTEM_MODE 0x1f 44#define MODE_MASK 0x1f 45#define T_BIT 0x20 46#define F_BIT 0x40 47#define I_BIT 0x80 48#define A_BIT 0x100 49#define CC_V_BIT (1 << 28) 50#define CC_C_BIT (1 << 29) 51#define CC_Z_BIT (1 << 30) 52#define CC_N_BIT (1 << 31) 53#define PCMASK 0 54 55#ifndef __ASSEMBLY__ 56 57/* this struct defines the way the registers are stored on the 58 stack during a system call. */ 59 60struct pt_regs { 61 long uregs[18]; 62}; 63 64#define ARM_cpsr uregs[16] 65#define ARM_pc uregs[15] 66#define ARM_lr uregs[14] 67#define ARM_sp uregs[13] 68#define ARM_ip uregs[12] 69#define ARM_fp uregs[11] 70#define ARM_r10 uregs[10] 71#define ARM_r9 uregs[9] 72#define ARM_r8 uregs[8] 73#define ARM_r7 uregs[7] 74#define ARM_r6 uregs[6] 75#define ARM_r5 uregs[5] 76#define ARM_r4 uregs[4] 77#define ARM_r3 uregs[3] 78#define ARM_r2 uregs[2] 79#define ARM_r1 uregs[1] 80#define ARM_r0 uregs[0] 81#define ARM_ORIG_r0 uregs[17] 82 83#ifdef __KERNEL__ 84 85#define user_mode(regs) \ 86 (((regs)->ARM_cpsr & 0xf) == 0) 87 88#ifdef CONFIG_ARM_THUMB 89#define thumb_mode(regs) \ 90 (((regs)->ARM_cpsr & T_BIT)) 91#else 92#define thumb_mode(regs) (0) 93#endif 94 95#define processor_mode(regs) \ 96 ((regs)->ARM_cpsr & MODE_MASK) 97 98#define interrupts_enabled(regs) \ 99 (!((regs)->ARM_cpsr & I_BIT)) 100 101#define fast_interrupts_enabled(regs) \ 102 (!((regs)->ARM_cpsr & F_BIT)) 103 104#define condition_codes(regs) \ 105 ((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT)) 106 107/* Are the current registers suitable for user mode? 108 * (used to maintain security in signal handlers) 109 */ 110static inline int valid_user_regs(struct pt_regs *regs) 111{ 112 if ((regs->ARM_cpsr & 0xf) == 0 && 113 (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0) 114 return 1; 115 116 /* 117 * Force CPSR to something logical... 118 */ 119 regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10); 120 121 return 0; 122} 123 124#endif /* __KERNEL__ */ 125 126#endif /* __ASSEMBLY__ */ 127 128#endif /* CONFIG_ARM64 */ 129 130#endif 131