1
2
3
4
5
6
7#ifndef _PPC_IO_H
8#define _PPC_IO_H
9
10#include <asm/byteorder.h>
11
12#ifdef CONFIG_ADDR_MAP
13#include <addr_map.h>
14#endif
15
16#define SIO_CONFIG_RA 0x398
17#define SIO_CONFIG_RD 0x399
18
19#ifndef _IO_BASE
20#define _IO_BASE 0
21#endif
22
23#define readb(addr) in_8((volatile u8 *)(addr))
24#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
25#if !defined(__BIG_ENDIAN)
26#define readw(addr) (*(volatile u16 *) (addr))
27#define readl(addr) (*(volatile u32 *) (addr))
28#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
29#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
30#else
31#define readw(addr) in_le16((volatile u16 *)(addr))
32#define readl(addr) in_le32((volatile u32 *)(addr))
33#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
34#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
35#endif
36
37
38
39
40
41
42
43#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
44#define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
45#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
46#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
47#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
48#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
49
50#define inb(port) in_8((u8 *)((port)+_IO_BASE))
51#define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
52#if !defined(__BIG_ENDIAN)
53#define inw(port) in_be16((u16 *)((port)+_IO_BASE))
54#define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
55#define inl(port) in_be32((u32 *)((port)+_IO_BASE))
56#define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
57#else
58#define inw(port) in_le16((u16 *)((port)+_IO_BASE))
59#define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
60#define inl(port) in_le32((u32 *)((port)+_IO_BASE))
61#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
62#endif
63
64#define inb_p(port) in_8((u8 *)((port)+_IO_BASE))
65#define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
66#define inw_p(port) in_le16((u16 *)((port)+_IO_BASE))
67#define outw_p(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
68#define inl_p(port) in_le32((u32 *)((port)+_IO_BASE))
69#define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
70
71extern void _insb(volatile u8 *port, void *buf, int ns);
72extern void _outsb(volatile u8 *port, const void *buf, int ns);
73extern void _insw(volatile u16 *port, void *buf, int ns);
74extern void _outsw(volatile u16 *port, const void *buf, int ns);
75extern void _insl(volatile u32 *port, void *buf, int nl);
76extern void _outsl(volatile u32 *port, const void *buf, int nl);
77extern void _insw_ns(volatile u16 *port, void *buf, int ns);
78extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
79extern void _insl_ns(volatile u32 *port, void *buf, int nl);
80extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
81
82
83
84
85
86
87#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
88#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
89#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
90#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
91
92
93#define IO_SPACE_LIMIT ~0
94
95#define memset_io(a,b,c) memset((void *)(a),(b),(c))
96#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
97#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
98
99
100
101
102
103
104static inline void eieio(void)
105{
106 __asm__ __volatile__ ("eieio" : : : "memory");
107}
108
109static inline void sync(void)
110{
111 __asm__ __volatile__ ("sync" : : : "memory");
112}
113
114static inline void isync(void)
115{
116 __asm__ __volatile__ ("isync" : : : "memory");
117}
118
119
120
121
122#define iobarrier_rw() eieio()
123#define iobarrier_r() eieio()
124#define iobarrier_w() eieio()
125
126#define mb() sync()
127#define isb() isync()
128
129
130
131
132#define PCI_FIX_ADDR(addr) (addr)
133
134static inline unsigned char __raw_readb(const volatile void __iomem *addr)
135{
136 return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
137}
138static inline unsigned short __raw_readw(const volatile void __iomem *addr)
139{
140 return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
141}
142static inline unsigned int __raw_readl(const volatile void __iomem *addr)
143{
144 return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
145}
146static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
147{
148 *(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
149}
150static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
151{
152 *(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
153}
154static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
155{
156 *(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
157}
158
159
160
161
162
163
164
165
166static inline u8 in_8(const volatile unsigned char __iomem *addr)
167{
168 u8 ret;
169
170 __asm__ __volatile__(
171 "sync; lbz%U1%X1 %0,%1;\n"
172 "twi 0,%0,0;\n"
173 "isync" : "=r" (ret) : "m" (*addr));
174 return ret;
175}
176
177static inline void out_8(volatile unsigned char __iomem *addr, u8 val)
178{
179 __asm__ __volatile__("sync;\n"
180 "stb%U0%X0 %1,%0;\n"
181 : "=m" (*addr)
182 : "r" (val));
183}
184
185static inline u16 in_le16(const volatile unsigned short __iomem *addr)
186{
187 u16 ret;
188
189 __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
190 "twi 0,%0,0;\n"
191 "isync" : "=r" (ret) :
192 "r" (addr), "m" (*addr));
193 return ret;
194}
195
196static inline u16 in_be16(const volatile unsigned short __iomem *addr)
197{
198 u16 ret;
199
200 __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
201 "twi 0,%0,0;\n"
202 "isync" : "=r" (ret) : "m" (*addr));
203 return ret;
204}
205
206static inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
207{
208 __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
209 "r" (val), "r" (addr));
210}
211
212static inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
213{
214 __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
215}
216
217static inline u32 in_le32(const volatile unsigned __iomem *addr)
218{
219 u32 ret;
220
221 __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
222 "twi 0,%0,0;\n"
223 "isync" : "=r" (ret) :
224 "r" (addr), "m" (*addr));
225 return ret;
226}
227
228static inline u32 in_be32(const volatile unsigned __iomem *addr)
229{
230 u32 ret;
231
232 __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
233 "twi 0,%0,0;\n"
234 "isync" : "=r" (ret) : "m" (*addr));
235 return ret;
236}
237
238static inline void out_le32(volatile unsigned __iomem *addr, u32 val)
239{
240 __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
241 "r" (val), "r" (addr));
242}
243
244static inline void out_be32(volatile unsigned __iomem *addr, u32 val)
245{
246 __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
247}
248
249
250
251
252
253
254
255
256#define clrbits(type, addr, clear) \
257 out_##type((addr), in_##type(addr) & ~(clear))
258
259#define setbits(type, addr, set) \
260 out_##type((addr), in_##type(addr) | (set))
261
262#define clrsetbits(type, addr, clear, set) \
263 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
264
265#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
266#define setbits_be32(addr, set) setbits(be32, addr, set)
267#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
268
269#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
270#define setbits_le32(addr, set) setbits(le32, addr, set)
271#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
272
273#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
274#define setbits_be16(addr, set) setbits(be16, addr, set)
275#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
276
277#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
278#define setbits_le16(addr, set) setbits(le16, addr, set)
279#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
280
281#define clrbits_8(addr, clear) clrbits(8, addr, clear)
282#define setbits_8(addr, set) setbits(8, addr, set)
283#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
284
285
286
287
288
289
290#define MAP_NOCACHE (0)
291#define MAP_WRCOMBINE (0)
292#define MAP_WRBACK (0)
293#define MAP_WRTHROUGH (0)
294
295static inline void *
296map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
297{
298#ifdef CONFIG_ADDR_MAP
299 return addrmap_phys_to_virt(paddr);
300#else
301 return (void *)((unsigned long)paddr);
302#endif
303}
304
305
306
307
308static inline void unmap_physmem(void *vaddr, unsigned long flags)
309{
310
311}
312
313static inline phys_addr_t virt_to_phys(void * vaddr)
314{
315#ifdef CONFIG_ADDR_MAP
316 return addrmap_virt_to_phys(vaddr);
317#else
318 return (phys_addr_t)((unsigned long)vaddr);
319#endif
320}
321
322#endif
323