1/* 2 * Copyright (C) 2011 Andes Technology Corporation 3 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 4 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#include <common.h> 10#include <netdev.h> 11#include <asm/io.h> 12 13#include <faraday/ftsdc010.h> 14#include <faraday/ftsmc020.h> 15 16DECLARE_GLOBAL_DATA_PTR; 17 18/* 19 * Miscellaneous platform dependent initializations 20 */ 21 22int board_init(void) 23{ 24 /* 25 * refer to BOOT_PARAMETER_PA_BASE within 26 * "linux/arch/nds32/include/asm/misc_spec.h" 27 */ 28 gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P; 29 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; 30 31 return 0; 32} 33 34int dram_init(void) 35{ 36 unsigned long sdram_base = PHYS_SDRAM_0; 37 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; 38 unsigned long actual_size; 39 40 actual_size = get_ram_size((void *)sdram_base, expected_size); 41 42 gd->ram_size = actual_size; 43 44 if (expected_size != actual_size) { 45 printf("Warning: Only %lu of %lu MiB SDRAM is working\n", 46 actual_size >> 20, expected_size >> 20); 47 } 48 49 return 0; 50} 51 52void dram_init_banksize(void) 53{ 54 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; 55 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; 56 gd->bd->bi_dram[1].start = PHYS_SDRAM_1; 57 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; 58} 59 60int board_eth_init(bd_t *bd) 61{ 62 return ftmac100_initialize(bd); 63} 64 65ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) 66{ 67 if (banknum == 0) { /* non-CFI boot flash */ 68 info->portwidth = FLASH_CFI_8BIT; 69 info->chipwidth = FLASH_CFI_BY8; 70 info->interface = FLASH_CFI_X8; 71 return 1; 72 } else { 73 return 0; 74 } 75} 76 77int board_mmc_init(bd_t *bis) 78{ 79 ftsdc010_mmc_init(0); 80 return 0; 81} 82