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12#include <common.h>
13#include <config.h>
14#include <fdtdec.h>
15#include <asm/processor.h>
16#include <asm/microblaze_intc.h>
17#include <asm/asm.h>
18#include <asm/gpio.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22#ifdef CONFIG_XILINX_GPIO
23static int reset_pin = -1;
24#endif
25
26ulong ram_base;
27
28void dram_init_banksize(void)
29{
30 gd->bd->bi_dram[0].start = ram_base;
31 gd->bd->bi_dram[0].size = get_effective_memsize();
32}
33
34int dram_init(void)
35{
36 int node;
37 fdt_addr_t addr;
38 fdt_size_t size;
39 const void *blob = gd->fdt_blob;
40
41 node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
42 "memory", 7);
43 if (node == -FDT_ERR_NOTFOUND) {
44 debug("DRAM: Can't get memory node\n");
45 return 1;
46 }
47 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
48 if (addr == FDT_ADDR_T_NONE || size == 0) {
49 debug("DRAM: Can't get base address or size\n");
50 return 1;
51 }
52 ram_base = addr;
53
54 gd->ram_top = addr;
55 gd->ram_size = size;
56
57 return 0;
58};
59
60int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
61{
62#ifndef CONFIG_SPL_BUILD
63#ifdef CONFIG_XILINX_GPIO
64 if (reset_pin != -1)
65 gpio_direction_output(reset_pin, 1);
66#endif
67
68#ifdef CONFIG_XILINX_TB_WATCHDOG
69 hw_watchdog_disable();
70#endif
71#endif
72 puts ("Reseting board\n");
73 __asm__ __volatile__ (" mts rmsr, r0;" \
74 "bra r0");
75
76 return 0;
77}
78
79static int gpio_init(void)
80{
81#ifdef CONFIG_XILINX_GPIO
82 reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
83 if (reset_pin != -1)
84 gpio_request(reset_pin, "reset_pin");
85#endif
86 return 0;
87}
88
89int board_late_init(void)
90{
91 gpio_init();
92
93 return 0;
94}
95