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9
10
11static int cc_to_error[16] = {
12
13
14 0,
15 USB_ST_CRC_ERR,
16 USB_ST_BIT_ERR,
17 USB_ST_CRC_ERR,
18 USB_ST_STALLED,
19 -1,
20 USB_ST_BIT_ERR,
21 USB_ST_BIT_ERR,
22 USB_ST_BUF_ERR,
23 USB_ST_BUF_ERR,
24 -1,
25 -1,
26 USB_ST_BUF_ERR,
27 USB_ST_BUF_ERR,
28 -1,
29 -1
30};
31
32
33#define ED_NEW 0x00
34#define ED_UNLINK 0x01
35#define ED_OPER 0x02
36#define ED_DEL 0x04
37#define ED_URB_DEL 0x08
38
39
40struct ed {
41 __u32 hwINFO;
42 __u32 hwTailP;
43 __u32 hwHeadP;
44 __u32 hwNextED;
45
46 struct ed *ed_prev;
47 __u8 int_period;
48 __u8 int_branch;
49 __u8 int_load;
50 __u8 int_interval;
51 __u8 state;
52 __u8 type;
53 __u16 last_iso;
54 struct ed *ed_rm_list;
55
56 struct usb_device *usb_dev;
57 __u32 unused[3];
58} __attribute__ ((aligned(16)));
59
60
61#define TD_CC 0xf0000000
62#define TD_CC_GET(td_p) (((td_p) >> 28) & 0x0f)
63#define TD_CC_SET(td_p, cc) \
64 {(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)}
65#define TD_EC 0x0C000000
66#define TD_T 0x03000000
67#define TD_T_DATA0 0x02000000
68#define TD_T_DATA1 0x03000000
69#define TD_T_TOGGLE 0x00000000
70#define TD_R 0x00040000
71#define TD_DI 0x00E00000
72#define TD_DI_SET(X) (((X) & 0x07)<< 21)
73#define TD_DP 0x00180000
74#define TD_DP_SETUP 0x00000000
75#define TD_DP_IN 0x00100000
76#define TD_DP_OUT 0x00080000
77
78#define TD_ISO 0x00010000
79#define TD_DEL 0x00020000
80
81
82#define TD_CC_NOERROR 0x00
83#define TD_CC_CRC 0x01
84#define TD_CC_BITSTUFFING 0x02
85#define TD_CC_DATATOGGLEM 0x03
86#define TD_CC_STALL 0x04
87#define TD_DEVNOTRESP 0x05
88#define TD_PIDCHECKFAIL 0x06
89#define TD_UNEXPECTEDPID 0x07
90#define TD_DATAOVERRUN 0x08
91#define TD_DATAUNDERRUN 0x09
92#define TD_BUFFEROVERRUN 0x0C
93#define TD_BUFFERUNDERRUN 0x0D
94#define TD_NOTACCESSED 0x0F
95
96
97#define MAXPSW 1
98
99struct td {
100 __u32 hwINFO;
101 __u32 hwCBP;
102 __u32 hwNextTD;
103 __u32 hwBE;
104
105 __u8 unused;
106 __u8 index;
107 struct ed *ed;
108 struct td *next_dl_td;
109 struct usb_device *usb_dev;
110 int transfer_len;
111 __u32 data;
112
113 __u32 unused2[2];
114} __attribute__ ((aligned(32)));
115
116#define OHCI_ED_SKIP (1 << 14)
117
118
119
120
121
122
123
124#define NUM_INTS 32
125struct ohci_hcca {
126 __u32 int_table[NUM_INTS];
127 __u16 frame_no;
128 __u16 pad1;
129 __u32 done_head;
130 u8 reserved_for_hc[116];
131} __attribute__ ((aligned(256)));
132
133
134
135
136#define MAX_ROOT_PORTS 15
137
138
139
140
141
142
143struct ohci_regs {
144
145 __u32 revision;
146 __u32 control;
147 __u32 cmdstatus;
148 __u32 intrstatus;
149 __u32 intrenable;
150 __u32 intrdisable;
151
152 __u32 hcca;
153 __u32 ed_periodcurrent;
154 __u32 ed_controlhead;
155 __u32 ed_controlcurrent;
156 __u32 ed_bulkhead;
157 __u32 ed_bulkcurrent;
158 __u32 donehead;
159
160 __u32 fminterval;
161 __u32 fmremaining;
162 __u32 fmnumber;
163 __u32 periodicstart;
164 __u32 lsthresh;
165
166 struct ohci_roothub_regs {
167 __u32 a;
168 __u32 b;
169 __u32 status;
170 __u32 portstatus[MAX_ROOT_PORTS];
171 } roothub;
172} __attribute__ ((aligned(32)));
173
174
175
176
177
178
179#define OHCI_CTRL_CBSR (3 << 0)
180#define OHCI_CTRL_PLE (1 << 2)
181#define OHCI_CTRL_IE (1 << 3)
182#define OHCI_CTRL_CLE (1 << 4)
183#define OHCI_CTRL_BLE (1 << 5)
184#define OHCI_CTRL_HCFS (3 << 6)
185#define OHCI_CTRL_IR (1 << 8)
186#define OHCI_CTRL_RWC (1 << 9)
187#define OHCI_CTRL_RWE (1 << 10)
188
189
190# define OHCI_USB_RESET (0 << 6)
191# define OHCI_USB_RESUME (1 << 6)
192# define OHCI_USB_OPER (2 << 6)
193# define OHCI_USB_SUSPEND (3 << 6)
194
195
196
197
198#define OHCI_HCR (1 << 0)
199#define OHCI_CLF (1 << 1)
200#define OHCI_BLF (1 << 2)
201#define OHCI_OCR (1 << 3)
202#define OHCI_SOC (3 << 16)
203
204
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206
207
208
209
210#define OHCI_INTR_SO (1 << 0)
211#define OHCI_INTR_WDH (1 << 1)
212#define OHCI_INTR_SF (1 << 2)
213#define OHCI_INTR_RD (1 << 3)
214#define OHCI_INTR_UE (1 << 4)
215#define OHCI_INTR_FNO (1 << 5)
216#define OHCI_INTR_RHSC (1 << 6)
217#define OHCI_INTR_OC (1 << 30)
218#define OHCI_INTR_MIE (1 << 31)
219
220
221struct virt_root_hub {
222 int devnum;
223 void *dev;
224 void *int_addr;
225 int send;
226 int interval;
227};
228
229
230
231
232#define RH_INTERFACE 0x01
233#define RH_ENDPOINT 0x02
234#define RH_OTHER 0x03
235
236#define RH_CLASS 0x20
237#define RH_VENDOR 0x40
238
239
240#define RH_GET_STATUS 0x0080
241#define RH_CLEAR_FEATURE 0x0100
242#define RH_SET_FEATURE 0x0300
243#define RH_SET_ADDRESS 0x0500
244#define RH_GET_DESCRIPTOR 0x0680
245#define RH_SET_DESCRIPTOR 0x0700
246#define RH_GET_CONFIGURATION 0x0880
247#define RH_SET_CONFIGURATION 0x0900
248#define RH_GET_STATE 0x0280
249#define RH_GET_INTERFACE 0x0A80
250#define RH_SET_INTERFACE 0x0B00
251#define RH_SYNC_FRAME 0x0C80
252
253#define RH_SET_EP 0x2000
254
255
256
257#define RH_PORT_CONNECTION 0x00
258#define RH_PORT_ENABLE 0x01
259#define RH_PORT_SUSPEND 0x02
260#define RH_PORT_OVER_CURRENT 0x03
261#define RH_PORT_RESET 0x04
262#define RH_PORT_POWER 0x08
263#define RH_PORT_LOW_SPEED 0x09
264
265#define RH_C_PORT_CONNECTION 0x10
266#define RH_C_PORT_ENABLE 0x11
267#define RH_C_PORT_SUSPEND 0x12
268#define RH_C_PORT_OVER_CURRENT 0x13
269#define RH_C_PORT_RESET 0x14
270
271
272#define RH_C_HUB_LOCAL_POWER 0x00
273#define RH_C_HUB_OVER_CURRENT 0x01
274
275#define RH_DEVICE_REMOTE_WAKEUP 0x00
276#define RH_ENDPOINT_STALL 0x01
277
278#define RH_ACK 0x01
279#define RH_REQ_ERR -1
280#define RH_NACK 0x00
281
282
283
284
285
286#define RH_PS_CCS 0x00000001
287#define RH_PS_PES 0x00000002
288#define RH_PS_PSS 0x00000004
289#define RH_PS_POCI 0x00000008
290#define RH_PS_PRS 0x00000010
291#define RH_PS_PPS 0x00000100
292#define RH_PS_LSDA 0x00000200
293#define RH_PS_CSC 0x00010000
294#define RH_PS_PESC 0x00020000
295#define RH_PS_PSSC 0x00040000
296#define RH_PS_OCIC 0x00080000
297#define RH_PS_PRSC 0x00100000
298
299
300#define RH_HS_LPS 0x00000001
301#define RH_HS_OCI 0x00000002
302#define RH_HS_DRWE 0x00008000
303#define RH_HS_LPSC 0x00010000
304#define RH_HS_OCIC 0x00020000
305#define RH_HS_CRWE 0x80000000
306
307
308#define RH_B_DR 0x0000ffff
309#define RH_B_PPCM 0xffff0000
310
311
312#define RH_A_NDP (0xff << 0)
313#define RH_A_PSM (1 << 8)
314#define RH_A_NPS (1 << 9)
315#define RH_A_DT (1 << 10)
316#define RH_A_OCPM (1 << 11)
317#define RH_A_NOCP (1 << 12)
318#define RH_A_POTPGT (0xff << 24)
319
320
321#define N_URB_TD 48
322struct urb_priv {
323 struct ed *ed;
324 __u16 length;
325 __u16 td_cnt;
326 int state;
327 unsigned long pipe;
328 int actual_length;
329 struct td *td[N_URB_TD];
330
331};
332#define URB_DEL 1
333
334
335
336
337
338
339
340
341
342struct ohci {
343 struct ohci_hcca *hcca;
344
345
346 int irq;
347 int disabled;
348 int sleeping;
349 unsigned long flags;
350
351 struct ohci_regs *regs;
352
353 struct ed *ed_rm_list[2];
354 struct ed *ed_bulktail;
355 struct ed *ed_controltail;
356 int intrstatus;
357 __u32 hc_control;
358 struct usb_device *dev[32];
359 struct virt_root_hub rh;
360
361 const char *slot_name;
362};
363
364#define NUM_EDS 8
365
366struct ohci_device {
367 struct ed ed[NUM_EDS];
368 int ed_cnt;
369};
370
371
372
373static int ep_link(struct ohci *ohci, struct ed *ed);
374static int ep_unlink(struct ohci *ohci, struct ed *ed);
375static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe);
376
377
378
379
380#define NUM_TD 64
381
382
383struct td gtd[NUM_TD + 1];
384
385
386struct td *ptd;
387
388
389static inline struct td *td_alloc(struct usb_device *usb_dev)
390{
391 int i;
392 struct td *td;
393
394 td = NULL;
395 for (i = 0; i < NUM_TD; i++) {
396 if (ptd[i].usb_dev == NULL) {
397 td = &ptd[i];
398 td->usb_dev = usb_dev;
399 break;
400 }
401 }
402
403 return td;
404}
405
406static inline void ed_free(struct ed *ed)
407{
408 ed->usb_dev = NULL;
409}
410