1/* Configuration header file for Gaisler Research AB's Template 2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS 3 * Development board Stratix II edition, with the FPGA device 4 * EP2S60. 5 * 6 * (C) Copyright 2003-2005 7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 8 * 9 * (C) Copyright 2008 10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15#ifndef __CONFIG_H__ 16#define __CONFIG_H__ 17 18/* 19 * High Level Configuration Options 20 * (easy to change) 21 */ 22 23/* Altera NIOS Development board, Stratix II board */ 24#define CONFIG_GR_EP2S60 1 25 26/* CPU / AMBA BUS configuration */ 27#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */ 28 29/* Define this is the GR-2S60-MEZZ mezzanine is available and you 30 * want to use the USB and GRETH functionality of the board 31 */ 32#undef GR_2S60_MEZZ 33 34#ifdef GR_2S60_MEZZ 35#define USE_GRETH 1 36#define USE_GRUSB 1 37#endif 38 39/* 40 * Serial console configuration 41 */ 42#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ 43#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } 44 45/* Partitions */ 46#define CONFIG_DOS_PARTITION 47#define CONFIG_MAC_PARTITION 48#define CONFIG_ISO_PARTITION 49 50/* 51 * Supported commands 52 */ 53#define CONFIG_CMD_REGINFO 54#define CONFIG_CMD_DIAG 55#define CONFIG_CMD_IRQ 56 57/* USB support */ 58#if USE_GRUSB 59#define CONFIG_USB_UHCI 60/* Enable needed helper functions */ 61#endif 62 63/* 64 * Autobooting 65 */ 66 67#define CONFIG_PREBOOT "echo;" \ 68 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ 69 "echo" 70 71#undef CONFIG_BOOTARGS 72 73#define CONFIG_EXTRA_ENV_SETTINGS \ 74 "netdev=eth0\0" \ 75 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ 76 "nfsroot=${serverip}:${rootpath}\0" \ 77 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ 78 "addip=setenv bootargs ${bootargs} " \ 79 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 80 ":${hostname}:${netdev}:off panic=1\0" \ 81 "flash_nfs=run nfsargs addip;" \ 82 "bootm ${kernel_addr}\0" \ 83 "flash_self=run ramargs addip;" \ 84 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 85 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ 86 "scratch=40800000\0" \ 87 "getkernel=tftpboot $(scratch) $(bootfile)\0" \ 88 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \ 89 "" 90 91#define CONFIG_NETMASK 255.255.255.0 92#define CONFIG_GATEWAYIP 192.168.0.1 93#define CONFIG_SERVERIP 192.168.0.20 94#define CONFIG_IPADDR 192.168.0.207 95#define CONFIG_ROOTPATH "/export/rootfs" 96#define CONFIG_HOSTNAME ml401 97#define CONFIG_BOOTFILE "/uImage" 98 99#define CONFIG_BOOTCOMMAND "run flash_self" 100 101/* Memory MAP 102 * 103 * Flash: 104 * |--------------------------------| 105 * | 0x00000000 Text & Data & BSS | * 106 * | for Monitor | * 107 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * 108 * | UNUSED / Growth | * 256kb 109 * |--------------------------------| 110 * | 0x00050000 Base custom area | * 111 * | kernel / FS | * 112 * | | * Rest of Flash 113 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| 114 * | END-0x00008000 Environment | * 32kb 115 * |--------------------------------| 116 * 117 * 118 * 119 * Main Memory: 120 * |--------------------------------| 121 * | UNUSED / scratch area | 122 * | | 123 * | | 124 * | | 125 * | | 126 * |--------------------------------| 127 * | Monitor .Text / .DATA / .BSS | * 512kb 128 * | Relocated! | * 129 * |--------------------------------| 130 * | Monitor Malloc | * 128kb (contains relocated environment) 131 * |--------------------------------| 132 * | Monitor/kernel STACK | * 64kb 133 * |--------------------------------| 134 * | Page Table for MMU systems | * 2k 135 * |--------------------------------| 136 * | PROM Code accessed from Linux | * 6kb-128b 137 * |--------------------------------| 138 * | Global data (avail from kernel)| * 128b 139 * |--------------------------------| 140 * 141 */ 142 143/* 144 * Flash configuration (8,16 or 32 MB) 145 * TEXT base always at 0xFFF00000 146 * ENV_ADDR always at 0xFFF40000 147 * FLASH_BASE at 0xFC000000 for 64 MB 148 * 0xFE000000 for 32 MB 149 * 0xFF000000 for 16 MB 150 * 0xFF800000 for 8 MB 151 */ 152/*#define CONFIG_SYS_NO_FLASH 1*/ 153#define CONFIG_SYS_FLASH_BASE 0x00000000 154#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */ 155 156#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ 157#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */ 158#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ 159 160#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ 161#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ 162#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ 163#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ 164#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 165 166/*** CFI CONFIG ***/ 167#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 168#define CONFIG_FLASH_CFI_DRIVER 169#define CONFIG_SYS_FLASH_CFI 170/* Bypass cache when reading regs from flash memory */ 171#define CONFIG_SYS_FLASH_CFI_BYPASS_READ 172/* Buffered writes (32byte/go) instead of single accesses */ 173#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 174 175/* 176 * Environment settings 177 */ 178/*#define CONFIG_ENV_IS_NOWHERE 1*/ 179#define CONFIG_ENV_IS_IN_FLASH 1 180/* CONFIG_ENV_ADDR need to be at sector boundary */ 181#define CONFIG_ENV_SIZE 0x8000 182#define CONFIG_ENV_SECT_SIZE 0x20000 183#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE) 184#define CONFIG_ENV_OVERWRITE 1 185 186/* 187 * Memory map 188 */ 189#define CONFIG_SYS_SDRAM_BASE 0x40000000 190#define CONFIG_SYS_SDRAM_SIZE 0x02000000 191#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) 192 193/* no SRAM available */ 194#undef CONFIG_SYS_SRAM_BASE 195#undef CONFIG_SYS_SRAM_SIZE 196 197#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE 198#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE 199#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END 200 201#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE) 202 203#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) 204#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) 205 206#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) 207#define CONFIG_SYS_STACK_SIZE (0x10000-32) 208 209#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 210#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) 211# define CONFIG_SYS_RAMBOOT 1 212#endif 213 214#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */ 215#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 216#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 217 218#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) 219#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) 220 221/* relocated monitor area */ 222#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE 223#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) 224 225/* make un relocated address from relocated address */ 226#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) 227 228/* 229 * Ethernet configuration uses on board SMC91C111, however if a mezzanine 230 * with a PHY is attached the GRETH can be used on this board. 231 * Define USE_GRETH in order to use the mezzanine provided PHY with the 232 * onchip GRETH network MAC, note that this is not supported by the 233 * template design. 234 */ 235#ifndef USE_GRETH 236 237/* USE SMC91C111 MAC */ 238#define CONFIG_SMC91111 1 239#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ 240#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ 241#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ 242/*#define CONFIG_SHOW_ACTIVITY*/ 243#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ 244 245#else 246 247/* USE GRETH Ethernet Driver */ 248#define CONFIG_GRETH 1 249#endif 250 251#define CONFIG_PHY_ADDR 0x00 252 253/* 254 * Miscellaneous configurable options 255 */ 256#define CONFIG_SYS_LONGHELP /* undef to save memory */ 257#if defined(CONFIG_CMD_KGDB) 258#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 259#else 260#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 261#endif 262#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 263#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 264#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 265 266#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ 267#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ 268 269#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ 270 271/*----------------------------------------------------------------------- 272 * USB stuff 273 *----------------------------------------------------------------------- 274 */ 275#define CONFIG_USB_CLOCK 0x0001BBBB 276#define CONFIG_USB_CONFIG 0x00005000 277 278/***** Gaisler GRLIB IP-Cores Config ********/ 279 280#define CONFIG_SYS_GRLIB_SDRAM 0 281 282/* No SDRAM Configuration */ 283#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1 284 285/* See, GRLIB Docs (grip.pdf) on how to set up 286 * These the memory controller registers. 287 */ 288#define CONFIG_SYS_GRLIB_ESA_MCTRL1 289#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11)) 290#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x00000000 291#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00000000 292 293/* GRLIB FT-MCTRL configuration */ 294#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1 295#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11)) 296#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x00000000 297#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00000000 298 299/* DDR controller */ 300#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1 301#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL 0xa900830a 302 303/* no DDR2 Controller */ 304#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 305 306/* default kernel command line */ 307#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" 308 309#endif /* __CONFIG_H */ 310