1/* 2 * (C) Copyright 2007-2009 3 * Stefan Roese, DENX Software Engineering, sr@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#ifndef _4xx_i2c_h_ 9#define _4xx_i2c_h_ 10 11#define IIC_OK 0 12#define IIC_NOK 1 13#define IIC_NOK_LA 2 /* Lost arbitration */ 14#define IIC_NOK_ICT 3 /* Incomplete transfer */ 15#define IIC_NOK_XFRA 4 /* Transfer aborted */ 16#define IIC_NOK_DATA 5 /* No data in buffer */ 17#define IIC_NOK_TOUT 6 /* Transfer timeout */ 18 19#define IIC_TIMEOUT 1 /* 1 second */ 20 21struct ppc4xx_i2c { 22 u8 mdbuf; 23 u8 res1; 24 u8 sdbuf; 25 u8 res2; 26 u8 lmadr; 27 u8 hmadr; 28 u8 cntl; 29 u8 mdcntl; 30 u8 sts; 31 u8 extsts; 32 u8 lsadr; 33 u8 hsadr; 34 u8 clkdiv; 35 u8 intrmsk; 36 u8 xfrcnt; 37 u8 xtcntlss; 38 u8 directcntl; 39 u8 intr; 40}; 41 42/* MDCNTL Register Bit definition */ 43#define IIC_MDCNTL_HSCL 0x01 44#define IIC_MDCNTL_EUBS 0x02 45#define IIC_MDCNTL_EINT 0x04 46#define IIC_MDCNTL_ESM 0x08 47#define IIC_MDCNTL_FSM 0x10 48#define IIC_MDCNTL_EGC 0x20 49#define IIC_MDCNTL_FMDB 0x40 50#define IIC_MDCNTL_FSDB 0x80 51 52/* CNTL Register Bit definition */ 53#define IIC_CNTL_PT 0x01 54#define IIC_CNTL_READ 0x02 55#define IIC_CNTL_CHT 0x04 56#define IIC_CNTL_RPST 0x08 57/* bit 2/3 for Transfer count*/ 58#define IIC_CNTL_AMD 0x40 59#define IIC_CNTL_HMT 0x80 60 61/* STS Register Bit definition */ 62#define IIC_STS_PT 0x01 63#define IIC_STS_IRQA 0x02 64#define IIC_STS_ERR 0x04 65#define IIC_STS_SCMP 0x08 66#define IIC_STS_MDBF 0x10 67#define IIC_STS_MDBS 0x20 68#define IIC_STS_SLPR 0x40 69#define IIC_STS_SSS 0x80 70 71/* EXTSTS Register Bit definition */ 72#define IIC_EXTSTS_XFRA 0x01 73#define IIC_EXTSTS_ICT 0x02 74#define IIC_EXTSTS_LA 0x04 75#define IIC_EXTSTS_BCS_MASK 0x70 76#define IIC_EXTSTS_BCS_FREE 0x40 77 78/* XTCNTLSS Register Bit definition */ 79#define IIC_XTCNTLSS_SRST 0x01 80#define IIC_XTCNTLSS_EPI 0x02 81#define IIC_XTCNTLSS_SDBF 0x04 82#define IIC_XTCNTLSS_SBDD 0x08 83#define IIC_XTCNTLSS_SWS 0x10 84#define IIC_XTCNTLSS_SWC 0x20 85#define IIC_XTCNTLSS_SRS 0x40 86#define IIC_XTCNTLSS_SRC 0x80 87 88/* IICx_DIRECTCNTL register */ 89#define IIC_DIRCNTL_SDAC 0x08 90#define IIC_DIRCNTL_SCC 0x04 91#define IIC_DIRCNTL_MSDA 0x02 92#define IIC_DIRCNTL_MSC 0x01 93 94#define DIRCTNL_FREE(v) (((v) & 0x0f) == 0x0f) 95#endif 96