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26#define OMAP_TAG_CLOCK 0x4f01
27#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
28#define OMAP_TAG_USB 0x4f04
29#define OMAP_TAG_LCD 0x4f05
30#define OMAP_TAG_GPIO_SWITCH 0x4f06
31#define OMAP_TAG_UART 0x4f07
32#define OMAP_TAG_FBMEM 0x4f08
33#define OMAP_TAG_STI_CONSOLE 0x4f09
34#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
35#define OMAP_TAG_PARTITION 0x4f0b
36#define OMAP_TAG_TEA5761 0x4f10
37#define OMAP_TAG_TMP105 0x4f11
38
39#define OMAP_TAG_BOOT_REASON 0x4f80
40#define OMAP_TAG_FLASH_PART_STR 0x4f81
41#define OMAP_TAG_VERSION_STR 0x4f82
42
43#define OMAP_TAG_NOKIA_BT 0x4e01
44#define OMAP_TAG_WLAN_CX3110X 0x4e02
45#define OMAP_TAG_CBUS 0x4e03
46#define OMAP_TAG_EM_ASIC_BB5 0x4e04
47
48
49struct omap_clock_config {
50
51 u8 system_clock_type;
52};
53
54struct omap_serial_console_config {
55 u8 console_uart;
56 u32 console_speed;
57};
58
59struct omap_sti_console_config {
60 unsigned enable:1;
61 u8 channel;
62};
63
64struct omap_usb_config {
65
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72
73 unsigned register_host:1;
74 unsigned register_dev:1;
75 u8 otg;
76
77 u8 hmc_mode;
78
79
80 u8 rwc;
81
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88
89 u8 pins[3];
90};
91
92struct omap_lcd_config {
93 char panel_name[16];
94 char ctrl_name[16];
95 s16 nreset_gpio;
96 u8 data_lines;
97};
98
99struct omap_fbmem_config {
100 u32 start;
101 u32 size;
102};
103
104struct omap_gpio_switch_config {
105 char name[12];
106 u16 gpio;
107 u8 flags:4;
108 u8 type:4;
109 unsigned int key_code:24;
110};
111
112struct omap_uart_config {
113
114 unsigned int enabled_uarts;
115};
116
117struct omap_tea5761_config {
118 u16 enable_gpio;
119};
120
121struct omap_partition_config {
122 char name[16];
123 unsigned int size;
124 unsigned int offset;
125
126 unsigned int mask_flags;
127};
128
129struct omap_flash_part_str_config {
130 char part_table[0];
131};
132
133struct omap_boot_reason_config {
134 char reason_str[12];
135};
136
137struct omap_version_config {
138 char component[12];
139 char version[12];
140};
141
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150
151struct omap_bluetooth_config {
152 u8 chip_type;
153 u8 bt_wakeup_gpio;
154 u8 host_wakeup_gpio;
155 u8 reset_gpio;
156 u8 bt_uart;
157 u8 bd_addr[6];
158 u8 bt_sysclk;
159};
160
161struct omap_wlan_cx3110x_config {
162 u8 chip_type;
163 u8 reserverd;
164 s16 power_gpio;
165 s16 irq_gpio;
166 s16 spi_cs_gpio;
167};
168
169struct omap_cbus_config {
170 s16 clk_gpio;
171 s16 dat_gpio;
172 s16 sel_gpio;
173};
174
175struct omap_em_asic_bb5_config {
176 s16 retu_irq_gpio;
177 s16 tahvo_irq_gpio;
178};
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189
190#define ATAG_BOARD 0x414f4d50
191
192struct tag_omap_header {
193 u16 tag;
194 u16 size;
195};
196
197struct tag_omap {
198 struct tag_omap_header hdr;
199 union {
200 struct omap_clock_config clock;
201 struct omap_serial_console_config serial_console;
202 struct omap_sti_console_config sti_console;
203 struct omap_usb_config usb;
204 struct omap_lcd_config lcd;
205 struct omap_fbmem_config fbmem;
206 struct omap_gpio_switch_config gpio_switch;
207 struct omap_uart_config uart;
208 struct omap_tea5761_config tea5761;
209 struct omap_partition_config partition;
210 struct omap_flash_part_str_config flash_part_str;
211 struct omap_boot_reason_config boot_reason;
212 struct omap_version_config version;
213 struct omap_bluetooth_config bluetooth;
214 struct omap_wlan_cx3110x_config wlan_cx3110x;
215 struct omap_cbus_config cbus;
216 struct omap_em_asic_bb5_config em_asic_bb5;
217 } u;
218};
219
220#define tag_omap_next(t) ((struct tag_omap *)((u8 *)(t) + \
221 (t)->hdr.size + sizeof(struct tag_omap_header)))
222
223#define OMAP_TAG_HEADER_CONFIG(config, type) \
224 .hdr.tag = config, \
225 .hdr.size = sizeof(struct type)
226
227#define OMAP_TAG_UART_CONFIG(p1) \
228 { \
229 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_UART, omap_uart_config), \
230 .u.uart.enabled_uarts = p1, \
231 }
232
233#define OMAP_TAG_SERIAL_CONSOLE_CONFIG(p1, p2) \
234 { \
235 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_SERIAL_CONSOLE, \
236 omap_serial_console_config), \
237 .u.serial_console.console_uart = p1, \
238 .u.serial_console.console_speed = p2, \
239 }
240
241#define OMAP_TAG_LCD_CONFIG(p1, p2, p3, p4) \
242 { \
243 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_LCD, omap_lcd_config), \
244 .u.lcd.panel_name = p1, \
245 .u.lcd.ctrl_name = p2, \
246 .u.lcd.nreset_gpio = p3, \
247 .u.lcd.data_lines = p4, \
248 }
249
250#define OMAP_TAG_GPIO_SWITCH_CONFIG(p1, p2, p3, p4, p5) \
251 { \
252 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_GPIO_SWITCH, \
253 omap_gpio_switch_config), \
254 .u.gpio_switch.name = p1, \
255 .u.gpio_switch.gpio = p2, \
256 .u.gpio_switch.flags = p3, \
257 .u.gpio_switch.type = p4, \
258 .u.gpio_switch.key_code = p5, \
259 }
260
261#define OMAP_TAG_WLAN_CX3110X_CONFIG(p1, p2, p3, p4, p5) \
262 { \
263 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_WLAN_CX3110X, \
264 omap_wlan_cx3110x_config), \
265 .u.wlan_cx3110x.chip_type = p1, \
266 .u.wlan_cx3110x.reserverd = p2, \
267 .u.wlan_cx3110x.power_gpio = p3, \
268 .u.wlan_cx3110x.irq_gpio = p4, \
269 .u.wlan_cx3110x.spi_cs_gpio = p5, \
270 }
271
272#define OMAP_TAG_PARTITION_CONFIG(p1, p2, p3, p4) \
273 { \
274 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_PARTITION, \
275 omap_partition_config), \
276 .u.partition.name = p1, \
277 .u.partition.size = p2, \
278 .u.partition.offset = p3, \
279 .u.partition.mask_flags = p4, \
280 }
281
282#define OMAP_TAG_BOOT_REASON_CONFIG(p1) \
283 { \
284 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_BOOT_REASON, \
285 omap_boot_reason_config), \
286 .u.boot_reason.reason_str = p1, \
287 }
288
289#define OMAP_TAG_VERSION_STR_CONFIG(p1, p2) \
290 { \
291 OMAP_TAG_HEADER_CONFIG(OMAP_TAG_VERSION_STR, \
292 omap_version_config), \
293 .u.version.component = p1, \
294 .u.version.version = p2, \
295 }
296
