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13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16
17#define CONFIG_CPM2 1
18
19#define CONFIG_SYS_TEXT_BASE 0xfff80000
20
21#define CONFIG_PCI_INDIRECT_BRIDGE
22#define CONFIG_SYS_PCI_64BIT 1
23#define CONFIG_TSEC_ENET
24#define CONFIG_ENV_OVERWRITE
25
26#define CONFIG_FSL_VIA
27
28#ifndef __ASSEMBLY__
29extern unsigned long get_clock_freq(void);
30#endif
31#define CONFIG_SYS_CLK_FREQ get_clock_freq()
32
33
34
35
36#define CONFIG_L2_CACHE
37#define CONFIG_BTB
38
39#define CONFIG_SYS_MEMTEST_START 0x00200000
40#define CONFIG_SYS_MEMTEST_END 0x00400000
41
42#define CONFIG_SYS_CCSRBAR 0xe0000000
43#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
44
45
46#define CONFIG_SPD_EEPROM
47#define CONFIG_DDR_SPD
48#undef CONFIG_FSL_DDR_INTERACTIVE
49
50#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
51
52#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
53#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
54
55#define CONFIG_DIMM_SLOTS_PER_CTLR 1
56#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
57
58
59#define SPD_EEPROM_ADDRESS 0x51
60
61
62
63
64#ifndef CONFIG_SPD_EEPROM
65#error ("CONFIG_SPD_EEPROM is required by MPC85555CDS")
66#endif
67
68#undef CONFIG_CLOCKS_IN_MHZ
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103
104#define CONFIG_SYS_FLASH_BASE 0xff000000
105
106#define CONFIG_SYS_BR0_PRELIM 0xff801001
107#define CONFIG_SYS_BR1_PRELIM 0xff001001
108
109#define CONFIG_SYS_OR0_PRELIM 0xff806e65
110#define CONFIG_SYS_OR1_PRELIM 0xff806e65
111
112#define CONFIG_SYS_FLASH_BANKS_LIST {0xff800000, CONFIG_SYS_FLASH_BASE}
113#define CONFIG_SYS_MAX_FLASH_BANKS 2
114#define CONFIG_SYS_MAX_FLASH_SECT 128
115#undef CONFIG_SYS_FLASH_CHECKSUM
116#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
117#define CONFIG_SYS_FLASH_WRITE_TOUT 500
118
119#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
120
121#define CONFIG_FLASH_CFI_DRIVER
122#define CONFIG_SYS_FLASH_CFI
123#define CONFIG_SYS_FLASH_EMPTY_INFO
124
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126
127
128#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
129#define CONFIG_SYS_LBC_SDRAM_SIZE 64
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148
149#define CONFIG_SYS_BR2_PRELIM 0xf0001861
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164
165#define CONFIG_SYS_OR2_PRELIM 0xfc006901
166
167#define CONFIG_SYS_LBC_LCRR 0x00030004
168#define CONFIG_SYS_LBC_LBCR 0x00000000
169#define CONFIG_SYS_LBC_LSRT 0x20000000
170#define CONFIG_SYS_LBC_MRTPR 0x00000000
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177
178#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
179 | LSDMR_PRETOACT7 \
180 | LSDMR_ACTTORW7 \
181 | LSDMR_BL8 \
182 | LSDMR_WRC4 \
183 | LSDMR_CL3 \
184 | LSDMR_RFEN \
185 )
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216
217#define CONFIG_FSL_CADMUS
218
219#define CADMUS_BASE_ADDR 0xf8000000
220#define CONFIG_SYS_BR3_PRELIM 0xf8000801
221#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
222
223#define CONFIG_SYS_INIT_RAM_LOCK 1
224#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
225#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
226
227#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
228#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
229
230#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
231#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
232
233
234#define CONFIG_CONS_INDEX 2
235#define CONFIG_SYS_NS16550_SERIAL
236#define CONFIG_SYS_NS16550_REG_SIZE 1
237#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
238
239#define CONFIG_SYS_BAUDRATE_TABLE \
240 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
241
242#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
243#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
244
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247
248#define CONFIG_SYS_I2C
249#define CONFIG_SYS_I2C_FSL
250#define CONFIG_SYS_FSL_I2C_SPEED 400000
251#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
252#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
253#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
254
255
256#define CONFIG_ID_EEPROM
257#define CONFIG_SYS_I2C_EEPROM_CCID
258#define CONFIG_SYS_ID_EEPROM
259#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
260#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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265
266#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
267#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
268#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
269#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
270#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
271#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
272#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
273#define CONFIG_SYS_PCI1_IO_SIZE 0x100000
274
275#define CONFIG_SYS_PCI2_MEM_VIRT 0xa0000000
276#define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000
277#define CONFIG_SYS_PCI2_MEM_PHYS 0xa0000000
278#define CONFIG_SYS_PCI2_MEM_SIZE 0x20000000
279#define CONFIG_SYS_PCI2_IO_VIRT 0xe2100000
280#define CONFIG_SYS_PCI2_IO_BUS 0x00000000
281#define CONFIG_SYS_PCI2_IO_PHYS 0xe2100000
282#define CONFIG_SYS_PCI2_IO_SIZE 0x100000
283
284#ifdef CONFIG_LEGACY
285#define BRIDGE_ID 17
286#define VIA_ID 2
287#else
288#define BRIDGE_ID 28
289#define VIA_ID 4
290#endif
291
292#if defined(CONFIG_PCI)
293
294#define CONFIG_MPC85XX_PCI2
295
296#undef CONFIG_EEPRO100
297#undef CONFIG_TULIP
298
299#undef CONFIG_PCI_SCAN_SHOW
300#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
301
302#endif
303
304#if defined(CONFIG_TSEC_ENET)
305
306#define CONFIG_MII 1
307#define CONFIG_TSEC1 1
308#define CONFIG_TSEC1_NAME "TSEC0"
309#define CONFIG_TSEC2 1
310#define CONFIG_TSEC2_NAME "TSEC1"
311#define TSEC1_PHY_ADDR 0
312#define TSEC2_PHY_ADDR 1
313#define TSEC1_PHYIDX 0
314#define TSEC2_PHYIDX 0
315#define TSEC1_FLAGS TSEC_GIGABIT
316#define TSEC2_FLAGS TSEC_GIGABIT
317
318
319#define CONFIG_ETHPRIME "TSEC0"
320
321#endif
322
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325
326#define CONFIG_ENV_IS_IN_FLASH 1
327#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
328#define CONFIG_ENV_SECT_SIZE 0x40000
329#define CONFIG_ENV_SIZE 0x2000
330
331#define CONFIG_LOADS_ECHO 1
332#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
333
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336
337#define CONFIG_BOOTP_BOOTFILESIZE
338#define CONFIG_BOOTP_BOOTPATH
339#define CONFIG_BOOTP_GATEWAY
340#define CONFIG_BOOTP_HOSTNAME
341
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343
344
345#define CONFIG_CMD_IRQ
346#define CONFIG_CMD_REGINFO
347
348#if defined(CONFIG_PCI)
349 #define CONFIG_CMD_PCI
350#endif
351
352#undef CONFIG_WATCHDOG
353
354
355
356
357#define CONFIG_SYS_LONGHELP
358#define CONFIG_CMDLINE_EDITING
359#define CONFIG_AUTO_COMPLETE
360#define CONFIG_SYS_LOAD_ADDR 0x2000000
361#if defined(CONFIG_CMD_KGDB)
362#define CONFIG_SYS_CBSIZE 1024
363#else
364#define CONFIG_SYS_CBSIZE 256
365#endif
366#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
367#define CONFIG_SYS_MAXARGS 16
368#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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374
375#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
376#define CONFIG_SYS_BOOTM_LEN (64 << 20)
377
378#if defined(CONFIG_CMD_KGDB)
379#define CONFIG_KGDB_BAUDRATE 230400
380#endif
381
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386
387#if defined(CONFIG_TSEC_ENET)
388#define CONFIG_HAS_ETH0
389#define CONFIG_HAS_ETH1
390#define CONFIG_HAS_ETH2
391#endif
392
393#define CONFIG_IPADDR 192.168.1.253
394
395#define CONFIG_HOSTNAME unknown
396#define CONFIG_ROOTPATH "/nfsroot"
397#define CONFIG_BOOTFILE "your.uImage"
398
399#define CONFIG_SERVERIP 192.168.1.1
400#define CONFIG_GATEWAYIP 192.168.1.1
401#define CONFIG_NETMASK 255.255.255.0
402
403#define CONFIG_LOADADDR 200000
404
405#undef CONFIG_BOOTARGS
406
407#define CONFIG_BAUDRATE 115200
408
409#define CONFIG_EXTRA_ENV_SETTINGS \
410 "netdev=eth0\0" \
411 "consoledev=ttyS1\0" \
412 "ramdiskaddr=600000\0" \
413 "ramdiskfile=your.ramdisk.u-boot\0" \
414 "fdtaddr=400000\0" \
415 "fdtfile=your.fdt.dtb\0"
416
417#define CONFIG_NFSBOOTCOMMAND \
418 "setenv bootargs root=/dev/nfs rw " \
419 "nfsroot=$serverip:$rootpath " \
420 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
421 "console=$consoledev,$baudrate $othbootargs;" \
422 "tftp $loadaddr $bootfile;" \
423 "tftp $fdtaddr $fdtfile;" \
424 "bootm $loadaddr - $fdtaddr"
425
426#define CONFIG_RAMBOOTCOMMAND \
427 "setenv bootargs root=/dev/ram rw " \
428 "console=$consoledev,$baudrate $othbootargs;" \
429 "tftp $ramdiskaddr $ramdiskfile;" \
430 "tftp $loadaddr $bootfile;" \
431 "bootm $loadaddr $ramdiskaddr"
432
433#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
434
435#endif
436