LXR uboot/include/configs/cm

   1/*
   2 * (C) Copyright 2013 CompuLab, Ltd.
   3 * Author: Igor Grinberg <grinberg@compulab.co.il>
   4 *
   5 * Configuration settings for the CompuLab CM-T3517 board
   6 *
   7 * SPDX-License-Identifier:     GPL-2.0+
   8 */
   9
  10#ifndef __CONFIG_H
  11#define __CONFIG_H
  12
  13/*
  14 * High Level Configuration Options
  15 */
  16#define CONFIG_OMAP     /* in a TI OMAP core */
  17#define CONFIG_CM_T3517 /* working with CM-T3517 */
  18/* Common ARM Erratas */
  19#define CONFIG_ARM_ERRATA_454179
  20#define CONFIG_ARM_ERRATA_430973
  21#define CONFIG_ARM_ERRATA_621766
  22
  23#define CONFIG_SYS_TEXT_BASE    0x80008000
  24
  25/*
  26 * This is needed for the DMA stuff.
  27 * Although the default iss 64, we still define it
  28 * to be on the safe side once the default is changed.
  29 */
  30
  31#define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  32
  33#include <asm/arch/cpu.h>               /* get chip and board defs */
  34#include <asm/arch/omap.h>
  35
  36#define CONFIG_MACH_TYPE                MACH_TYPE_CM_T3517
  37
  38/* Clock Defines */
  39#define V_OSCK                  26000000        /* Clock output from T2 */
  40#define V_SCLK                  (V_OSCK >> 1)
  41
  42#define CONFIG_MISC_INIT_R
  43
  44/*
  45 * The early kernel mapping on ARM currently only maps from the base of DRAM
  46 * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
  47 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
  48 * so that leaves DRAM base to DRAM base + 0x4000 available.
  49 */
  50#define CONFIG_SYS_BOOTMAPSZ            0x4000
  51
  52#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  53#define CONFIG_SETUP_MEMORY_TAGS
  54#define CONFIG_INITRD_TAG
  55#define CONFIG_REVISION_TAG
  56#define CONFIG_SERIAL_TAG
  57
  58/*
  59 * Size of malloc() pool
  60 */
  61#define CONFIG_ENV_SIZE         (128 << 10)     /* 128 KiB */
  62#define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
  63
  64/*
  65 * Hardware drivers
  66 */
  67
  68/*
  69 * NS16550 Configuration
  70 */
  71#define CONFIG_SYS_NS16550_SERIAL
  72#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  73#define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  74
  75/*
  76 * select serial console configuration
  77 */
  78#define CONFIG_CONS_INDEX               3
  79#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  80#define CONFIG_SERIAL3                  3       /* UART3 */
  81
  82/* allow to overwrite serial and ethaddr */
  83#define CONFIG_ENV_OVERWRITE
  84#define CONFIG_BAUDRATE                 115200
  85#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  86                                        115200}
  87
  88#define CONFIG_OMAP_GPIO
  89
  90#define CONFIG_GENERIC_MMC
  91#define CONFIG_OMAP_HSMMC
  92#define CONFIG_DOS_PARTITION
  93
  94/* USB */
  95#define CONFIG_USB_MUSB_AM35X
  96
  97#ifndef CONFIG_USB_MUSB_AM35X
  98#define CONFIG_USB_OMAP3
  99#define CONFIG_USB_EHCI
 100#define CONFIG_USB_EHCI_OMAP
 101#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
 102#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
 103#else /* !CONFIG_USB_MUSB_AM35X */
 104#define CONFIG_USB_MUSB_PIO_ONLY
 105#endif /* CONFIG_USB_MUSB_AM35X */
 106
 107/* commands to include */
 108#define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 109#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 110#define CONFIG_MTD_PARTITIONS
 111#define MTDIDS_DEFAULT          "nand0=nand"
 112#define MTDPARTS_DEFAULT        "mtdparts=nand:512k(x-loader),"\
 113                                "1920k(u-boot),256k(u-boot-env),"\
 114                                "4m(kernel),-(fs)"
 115
 116#define CONFIG_CMD_NAND         /* NAND support                 */
 117
 118#define CONFIG_SYS_NO_FLASH
 119#define CONFIG_SYS_I2C
 120#define CONFIG_SYS_OMAP24_I2C_SPEED     400000
 121#define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 122#define CONFIG_SYS_I2C_OMAP34XX
 123#define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 124#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 125#define CONFIG_SYS_I2C_EEPROM_BUS       0
 126#define CONFIG_I2C_MULTI_BUS
 127
 128/*
 129 * Board NAND Info.
 130 */
 131#define CONFIG_NAND_OMAP_GPMC
 132#define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 133                                                        /* to access nand */
 134#define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 135                                                        /* to access nand at */
 136                                                        /* CS0 */
 137#define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 138                                                        /* devices */
 139
 140/* Environment information */
 141#define CONFIG_EXTRA_ENV_SETTINGS \
 142        "loadaddr=0x82000000\0" \
 143        "baudrate=115200\0" \
 144        "console=ttyO2,115200n8\0" \
 145        "netretry=yes\0" \
 146        "mpurate=auto\0" \
 147        "vram=12M\0" \
 148        "dvimode=1024x768MR-16@60\0" \
 149        "defaultdisplay=dvi\0" \
 150        "mmcdev=0\0" \
 151        "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
 152        "mmcrootfstype=ext4\0" \
 153        "nandroot=/dev/mtdblock4 rw\0" \
 154        "nandrootfstype=ubifs\0" \
 155        "mmcargs=setenv bootargs console=${console} " \
 156                "mpurate=${mpurate} " \
 157                "vram=${vram} " \
 158                "omapfb.mode=dvi:${dvimode} " \
 159                "omapdss.def_disp=${defaultdisplay} " \
 160                "root=${mmcroot} " \
 161                "rootfstype=${mmcrootfstype}\0" \
 162        "nandargs=setenv bootargs console=${console} " \
 163                "mpurate=${mpurate} " \
 164                "vram=${vram} " \
 165                "omapfb.mode=dvi:${dvimode} " \
 166                "omapdss.def_disp=${defaultdisplay} " \
 167                "root=${nandroot} " \
 168                "rootfstype=${nandrootfstype}\0" \
 169        "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 170        "bootscript=echo Running bootscript from mmc ...; " \
 171                "source ${loadaddr}\0" \
 172        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 173        "mmcboot=echo Booting from mmc ...; " \
 174                "run mmcargs; " \
 175                "bootm ${loadaddr}\0" \
 176        "nandboot=echo Booting from nand ...; " \
 177                "run nandargs; " \
 178                "nand read ${loadaddr} 2a0000 400000; " \
 179                "bootm ${loadaddr}\0" \
 180
 181#define CONFIG_BOOTCOMMAND \
 182        "mmc dev ${mmcdev}; if mmc rescan; then " \
 183                "if run loadbootscript; then " \
 184                        "run bootscript; " \
 185                "else " \
 186                        "if run loaduimage; then " \
 187                                "run mmcboot; " \
 188                        "else run nandboot; " \
 189                        "fi; " \
 190                "fi; " \
 191        "else run nandboot; fi"
 192
 193/*
 194 * Miscellaneous configurable options
 195 */
 196#define CONFIG_AUTO_COMPLETE
 197#define CONFIG_CMDLINE_EDITING
 198#define CONFIG_TIMESTAMP
 199#define CONFIG_SYS_AUTOLOAD             "no"
 200#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 201#define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 202/* Print Buffer Size */
 203#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 204                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 205#define CONFIG_SYS_MAXARGS              32      /* max number of command args */
 206/* Boot Argument Buffer Size */
 207#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 208
 209#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
 210
 211/*
 212 * AM3517 has 12 GP timers, they can be driven by the system clock
 213 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 214 * This rate is divided by a local divisor.
 215 */
 216#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 217#define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 218#define CONFIG_SYS_HZ                   1000
 219
 220/*-----------------------------------------------------------------------
 221 * Physical Memory Map
 222 */
 223#define CONFIG_NR_DRAM_BANKS    1       /* CM-T3517 DRAM is only on CS0 */
 224#define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 225#define CONFIG_SYS_CS0_SIZE             (256 << 20)
 226
 227/*-----------------------------------------------------------------------
 228 * FLASH and environment organization
 229 */
 230
 231/* **** PISMO SUPPORT *** */
 232/* Monitor at start of flash */
 233#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 234#define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 235
 236#define CONFIG_ENV_IS_IN_NAND
 237#define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 238#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 239#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 240
 241#if defined(CONFIG_CMD_NET)
 242#define CONFIG_DRIVER_TI_EMAC
 243#define CONFIG_DRIVER_TI_EMAC_USE_RMII
 244#define CONFIG_MII
 245#define CONFIG_SMC911X
 246#define CONFIG_SMC911X_32_BIT
 247#define CONFIG_SMC911X_BASE     (0x2C000000 + (16 << 20))
 248#define CONFIG_ARP_TIMEOUT              200UL
 249#define CONFIG_NET_RETRY_COUNT          5
 250#endif /* CONFIG_CMD_NET */
 251
 252/* additions for new relocation code, must be added to all boards */
 253#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 254#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 255#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 256#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR +     \
 257                                         CONFIG_SYS_INIT_RAM_SIZE -     \
 258                                         GENERATED_GBL_DATA_SIZE)
 259
 260/* Status LED */
 261#define CONFIG_STATUS_LED               /* Status LED enabled */
 262#define CONFIG_BOARD_SPECIFIC_LED
 263#define CONFIG_GPIO_LED
 264#define GREEN_LED_GPIO                  186 /* CM-T3517 Green LED is GPIO186 */
 265#define GREEN_LED_DEV                   0
 266#define STATUS_LED_BIT                  GREEN_LED_GPIO
 267#define STATUS_LED_STATE                STATUS_LED_ON
 268#define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 269#define STATUS_LED_BOOT                 GREEN_LED_DEV
 270
 271/* GPIO banks */
 272#ifdef CONFIG_STATUS_LED
 273#define CONFIG_OMAP3_GPIO_6     /* GPIO186 is in GPIO bank 6  */
 274#endif
 275
 276/* Display Configuration */
 277#define CONFIG_OMAP3_GPIO_2
 278#define CONFIG_OMAP3_GPIO_5
 279#define CONFIG_VIDEO_OMAP3
 280#define LCD_BPP         LCD_COLOR16
 281
 282#define CONFIG_SPLASH_SCREEN
 283#define CONFIG_SPLASHIMAGE_GUARD
 284#define CONFIG_CMD_BMP
 285#define CONFIG_BMP_16BPP
 286#define CONFIG_SCF0403_LCD
 287
 288#define CONFIG_OMAP3_SPI
 289
 290/* EEPROM */
 291#define CONFIG_CMD_EEPROM
 292#define CONFIG_ENV_EEPROM_IS_ON_I2C
 293#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 294#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 295#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 296#define CONFIG_SYS_EEPROM_SIZE                  256
 297
 298#define CONFIG_CMD_EEPROM_LAYOUT
 299#define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
 300
 301#endif /* __CONFIG_H */
 302