LXR uboot/include/universe.h

   1/*
   2 * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#ifndef _universe_h
   8#define _universe_h
   9
  10typedef struct _UNIVERSE UNIVERSE;
  11typedef struct _SLAVE_IMAGE SLAVE_IMAGE;
  12typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;
  13
  14struct _SLAVE_IMAGE {
  15        unsigned int ctl;      /* Control     */
  16        unsigned int bs;       /* Base        */
  17        unsigned int bd;       /* Bound       */
  18        unsigned int to;       /* Translation */
  19        unsigned int reserved;
  20};
  21
  22struct _UNIVERSE {
  23        unsigned int pci_id;
  24        unsigned int pci_csr;
  25        unsigned int pci_class;
  26        unsigned int pci_misc0;
  27        unsigned int pci_bs;
  28        unsigned int spare0[10];
  29        unsigned int pci_misc1;
  30        unsigned int spare1[48];
  31        SLAVE_IMAGE  lsi[4];
  32        unsigned int spare2[8];
  33        unsigned int scyc_ctl;
  34        unsigned int scyc_addr;
  35        unsigned int scyc_en;
  36        unsigned int scyc_cmp;
  37        unsigned int scyc_swp;
  38        unsigned int lmisc;
  39        unsigned int slsi;
  40        unsigned int l_cmderr;
  41        unsigned int laerr;
  42        unsigned int spare3[27];
  43        unsigned int dctl;
  44        unsigned int dtbc;
  45        unsigned int dla;
  46        unsigned int spare4[1];
  47        unsigned int dva;
  48        unsigned int spare5[1];
  49        unsigned int dcpp;
  50        unsigned int spare6[1];
  51        unsigned int dgcs;
  52        unsigned int d_llue;
  53        unsigned int spare7[54];
  54        unsigned int lint_en;
  55        unsigned int lint_stat;
  56        unsigned int lint_map0;
  57        unsigned int lint_map1;
  58        unsigned int vint_en;
  59        unsigned int vint_stat;
  60        unsigned int vint_map0;
  61        unsigned int vint_map1;
  62        unsigned int statid;
  63        unsigned int vx_statid[7];
  64        unsigned int spare8[48];
  65        unsigned int mast_ctl;
  66        unsigned int misc_ctl;
  67        unsigned int misc_stat;
  68        unsigned int user_am;
  69        unsigned int spare9[700];
  70        SLAVE_IMAGE  vsi[4];
  71        unsigned int spare10[8];
  72        unsigned int vrai_ctl;
  73        unsigned int vrai_bs;
  74        unsigned int spare11[2];
  75        unsigned int vcsr_ctl;
  76        unsigned int vcsr_to;
  77        unsigned int v_amerr;
  78        unsigned int vaerr;
  79        unsigned int spare12[25];
  80        unsigned int vcsr_clr;
  81        unsigned int vcsr_set;
  82        unsigned int vcsr_bs;
  83};
  84
  85#define IRQ_VOWN    0x0001
  86#define IRQ_VIRQ1   0x0002
  87#define IRQ_VIRQ2   0x0004
  88#define IRQ_VIRQ3   0x0008
  89#define IRQ_VIRQ4   0x0010
  90#define IRQ_VIRQ5   0x0020
  91#define IRQ_VIRQ6   0x0040
  92#define IRQ_VIRQ7   0x0080
  93#define IRQ_DMA     0x0100
  94#define IRQ_LERR    0x0200
  95#define IRQ_VERR    0x0400
  96#define IRQ_res     0x0800
  97#define IRQ_IACK    0x1000
  98#define IRQ_SWINT   0x2000
  99#define IRQ_SYSFAIL 0x4000
 100#define IRQ_ACFAIL  0x8000
 101
 102struct _TDMA_CMD_PACKET {
 103        unsigned int dctl;   /* DMA Control         */
 104        unsigned int dtbc;   /* Transfer Byte Count */
 105        unsigned int dlv;    /* PCI Address         */
 106        unsigned int res1;   /* Reserved            */
 107        unsigned int dva;    /* Vme Address         */
 108        unsigned int res2;   /* Reserved            */
 109        unsigned int dcpp;   /* Pointer to Numed Cmd Packet with rPN */
 110        unsigned int res3;   /* Reserved                             */
 111};
 112
 113#define VME_AM_A16              0x01
 114#define VME_AM_A24              0x02
 115#define VME_AM_A32              0x03
 116#define VME_AM_Axx              0x03
 117#define VME_AM_SUP              0x04
 118#define VME_AM_DATA             0x10
 119#define VME_AM_PROG             0x20
 120#define VME_AM_Mxx              0x30
 121
 122#define VME_FLAG_D8             0x01
 123#define VME_FLAG_D16            0x02
 124#define VME_FLAG_D32            0x03
 125#define VME_FLAG_Dxx            0x03
 126
 127#define PCI_MS_MEM              0x01
 128#define PCI_MS_IO               0x02
 129#define PCI_MS_CONFIG           0x03
 130#define PCI_MS_Mxx              0x03
 131
 132#endif
 133