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10#ifndef __ASM_ARCH_CLOCK_H
11#define __ASM_ARCH_CLOCK_H
12
13#ifndef __ASSEMBLY__
14
15#ifdef CONFIG_SOC_K2HK
16#include <asm/arch/clock-k2hk.h>
17#endif
18
19#ifdef CONFIG_SOC_K2E
20#include <asm/arch/clock-k2e.h>
21#endif
22
23#ifdef CONFIG_SOC_K2L
24#include <asm/arch/clock-k2l.h>
25#endif
26
27#ifdef CONFIG_SOC_K2G
28#include <asm/arch/clock-k2g.h>
29#endif
30
31#define CORE_PLL MAIN_PLL
32#define DDR3_PLL DDR3A_PLL
33#define NSS_PLL PASS_PLL
34
35#define CLK_LIST(CLK)\
36 CLK(0, core_pll_clk)\
37 CLK(1, pass_pll_clk)\
38 CLK(2, tetris_pll_clk)\
39 CLK(3, ddr3a_pll_clk)\
40 CLK(4, ddr3b_pll_clk)\
41 CLK(5, sys_clk0_clk)\
42 CLK(6, sys_clk0_1_clk)\
43 CLK(7, sys_clk0_2_clk)\
44 CLK(8, sys_clk0_3_clk)\
45 CLK(9, sys_clk0_4_clk)\
46 CLK(10, sys_clk0_6_clk)\
47 CLK(11, sys_clk0_8_clk)\
48 CLK(12, sys_clk0_12_clk)\
49 CLK(13, sys_clk0_24_clk)\
50 CLK(14, sys_clk1_clk)\
51 CLK(15, sys_clk1_3_clk)\
52 CLK(16, sys_clk1_4_clk)\
53 CLK(17, sys_clk1_6_clk)\
54 CLK(18, sys_clk1_12_clk)\
55 CLK(19, sys_clk2_clk)\
56 CLK(20, sys_clk3_clk)\
57 CLK(21, uart_pll_clk)
58
59#include <asm/types.h>
60
61#define GENERATE_ENUM(NUM, ENUM) ENUM = NUM,
62#define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n"
63#define CLOCK_INDEXES_LIST CLK_LIST(GENERATE_INDX_STR)
64
65enum {
66 SPD200,
67 SPD400,
68 SPD600,
69 SPD800,
70 SPD850,
71 SPD900,
72 SPD1000,
73 SPD1200,
74 SPD1250,
75 SPD1350,
76 SPD1400,
77 SPD1500,
78 NUM_SPDS,
79};
80
81
82enum {
83 MAIN_PLL,
84 TETRIS_PLL,
85 PASS_PLL,
86 DDR3A_PLL,
87 DDR3B_PLL,
88 UART_PLL,
89 MAX_PLL_COUNT,
90};
91
92enum ext_clk_e {
93 sys_clk,
94 alt_core_clk,
95 pa_clk,
96 tetris_clk,
97 ddr3a_clk,
98 ddr3b_clk,
99 uart_clk,
100 ext_clk_count
101};
102
103enum clk_e {
104 CLK_LIST(GENERATE_ENUM)
105};
106
107struct keystone_pll_regs {
108 u32 reg0;
109 u32 reg1;
110};
111
112
113struct pll_init_data {
114 int pll;
115 int pll_m;
116 int pll_d;
117 int pll_od;
118};
119
120extern unsigned int external_clk[ext_clk_count];
121extern const struct keystone_pll_regs keystone_pll_regs[];
122extern s16 divn_val[];
123extern int speeds[];
124
125void init_plls(void);
126void init_pll(const struct pll_init_data *data);
127struct pll_init_data *get_pll_init_data(int pll);
128unsigned long ks_clk_get_rate(unsigned int clk);
129int get_max_dev_speed(int *spds);
130int get_max_arm_speed(int *spds);
131void pll_pa_clk_sel(void);
132
133#endif
134#endif
135