LXR uboot/board/freescale/c29xpcie/c29xpcie.c

   1/*
   2 * Copyright 2013 Freescale Semiconductor, Inc.
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#include <common.h>
   8#include <asm/processor.h>
   9#include <asm/mmu.h>
  10#include <asm/cache.h>
  11#include <asm/immap_85xx.h>
  12#include <asm/io.h>
  13#include <miiphy.h>
  14#include <libfdt.h>
  15#include <fdt_support.h>
  16#include <fsl_mdio.h>
  17#include <tsec.h>
  18#include <mmc.h>
  19#include <netdev.h>
  20#include <pci.h>
  21#include <fsl_ifc.h>
  22#include <asm/fsl_pci.h>
  23
  24#include "cpld.h"
  25
  26DECLARE_GLOBAL_DATA_PTR;
  27
  28int checkboard(void)
  29{
  30        struct cpu_type *cpu = gd->arch.cpu;
  31        struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
  32
  33        printf("Board: %sPCIe, ", cpu->name);
  34        printf("CPLD Ver: 0x%02x\n", in_8(&cpld_data->cpldver));
  35
  36        return 0;
  37}
  38
  39int board_early_init_f(void)
  40{
  41        struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
  42
  43        /* Clock configuration to access CPLD using IFC(GPCM) */
  44        setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
  45
  46        return 0;
  47}
  48
  49int board_early_init_r(void)
  50{
  51        const unsigned long flashbase = CONFIG_SYS_FLASH_BASE;
  52        int flash_esel = find_tlb_idx((void *)flashbase, 1);
  53
  54        /*
  55         * Remap Boot flash region to caching-inhibited
  56         * so that flash can be erased properly.
  57         */
  58
  59        /* Flush d-cache and invalidate i-cache of any FLASH data */
  60        flush_dcache();
  61        invalidate_icache();
  62
  63        if (flash_esel == -1) {
  64                /* very unlikely unless something is messed up */
  65                puts("Error: Could not find TLB for FLASH BASE\n");
  66                flash_esel = 1; /* give our best effort to continue */
  67        } else {
  68                /* invalidate existing TLB entry for flash */
  69                disable_tlb(flash_esel);
  70        }
  71
  72        set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  73                        MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  74                        0, flash_esel, BOOKE_PAGESZ_64M, 1);
  75
  76        return 0;
  77}
  78
  79#ifdef CONFIG_PCI
  80void pci_init_board(void)
  81{
  82        fsl_pcie_init_board(0);
  83}
  84#endif /* ifdef CONFIG_PCI */
  85
  86int board_eth_init(bd_t *bis)
  87{
  88#ifdef CONFIG_TSEC_ENET
  89        struct fsl_pq_mdio_info mdio_info;
  90        struct tsec_info_struct tsec_info[2];
  91        int num = 0;
  92
  93#ifdef CONFIG_TSEC1
  94        SET_STD_TSEC_INFO(tsec_info[num], 1);
  95        num++;
  96#endif
  97#ifdef CONFIG_TSEC2
  98        SET_STD_TSEC_INFO(tsec_info[num], 2);
  99        num++;
 100#endif
 101        if (!num) {
 102                printf("No TSECs initialized\n");
 103                return 0;
 104        }
 105
 106        /* Register 1G MDIO bus */
 107        mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
 108        mdio_info.name = DEFAULT_MII_NAME;
 109
 110        fsl_pq_mdio_init(bis, &mdio_info);
 111
 112        tsec_eth_init(bis, tsec_info, num);
 113#endif
 114
 115        return pci_eth_init(bis);
 116}
 117
 118#if defined(CONFIG_OF_BOARD_SETUP)
 119void fdt_del_sec(void *blob, int offset)
 120{
 121        int nodeoff = 0;
 122
 123        while ((nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,sec-v6.0",
 124                        CONFIG_SYS_CCSRBAR_PHYS + CONFIG_SYS_FSL_SEC_OFFSET
 125                        + offset * CONFIG_SYS_FSL_SEC_IDX_OFFSET)) >= 0) {
 126                fdt_del_node(blob, nodeoff);
 127                offset++;
 128        }
 129}
 130
 131int ft_board_setup(void *blob, bd_t *bd)
 132{
 133        phys_addr_t base;
 134        phys_size_t size;
 135        struct cpu_type *cpu;
 136
 137        cpu = gd->arch.cpu;
 138
 139        ft_cpu_setup(blob, bd);
 140
 141        base = getenv_bootm_low();
 142        size = getenv_bootm_size();
 143
 144#if defined(CONFIG_PCI)
 145        FT_FSL_PCI_SETUP;
 146#endif
 147
 148        fdt_fixup_memory(blob, (u64)base, (u64)size);
 149        if (cpu->soc_ver == SVR_C291)
 150                fdt_del_sec(blob, 1);
 151        else if (cpu->soc_ver == SVR_C292)
 152                fdt_del_sec(blob, 2);
 153
 154        return 0;
 155}
 156#endif
 157