1/* 2 * (C) Copyright 2013 - 2017 Xilinx. 3 * 4 * Configuration settings for the Xilinx Zynq CSE board. 5 * See zynq-common.h for Zynq common configs 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#ifndef __CONFIG_ZYNQ_CSE_H 11#define __CONFIG_ZYNQ_CSE_H 12 13#define _CONFIG_CMD_DEFAULT_H 14#define CONFIG_SKIP_LOWLEVEL_INIT 15#define CONFIG_ENV_IS_NOWHERE 16#define CONFIG_SYS_DCACHE_OFF 17#define CONFIG_SYS_ICACHE_OFF 18#define CONFIG_FIT_DISABLE_SHA256 19 20#include <configs/zynq-common.h> 21 22/* Undef unneeded configs */ 23#undef CONFIG_SYS_SDRAM_BASE 24#undef CONFIG_EXTRA_ENV_SETTINGS 25#undef CONFIG_BOARD_LATE_INIT 26#undef CONFIG_FPGA 27#undef CONFIG_FPGA_XILINX 28#undef CONFIG_FPGA_ZYNQPL 29#undef CONFIG_CMD_FPGA 30#undef CONFIG_FIT 31#undef CONFIG_FIT_VERBOSE 32#undef CONFIG_CMD_BOOTZ 33#undef CONFIG_BOOTCOMMAND 34#undef CONFIG_SYS_HUSH_PARSER 35#undef CONFIG_SYS_PROMPT_HUSH_PS2 36#undef CONFIG_ENV_SIZE 37#undef CONFIG_CMDLINE_EDITING 38#undef CONFIG_AUTO_COMPLETE 39#undef CONFIG_ZLIB 40#undef CONFIG_GZIP 41#undef CONFIG_CMD_SPL 42#undef CONFIG_SYS_LONGHELP 43#undef CONFIG_PARTITIONS 44#undef CONFIG_CMD_FPGA_LOADMK 45#undef CONFIG_CMD_FPGA_LOADP 46#undef CONFIG_CMD_FPGA_LOADBP 47#undef CONFIG_CMD_FPGA_LOADFS 48#undef CONFIG_CMD_GPIO 49#undef CONFIG_ZYNQ_GPIO 50#undef CONFIG_CMD_SPI 51#undef CONFIG_CMD_CLK 52#undef CONFIG_CMD_CACHE 53#undef CONFIG_SYS_CBSIZE 54#undef CONFIG_BOOTM_VXWORKS 55#undef CONFIG_BOOTM_LINUX 56#undef CONFIG_ZYNQ_SERIAL 57 58#define CONFIG_SYS_CBSIZE 1024 59 60#define CONFIG_ENV_SIZE 400 61#undef CONFIG_SYS_INIT_RAM_ADDR 62#undef CONFIG_SYS_INIT_RAM_SIZE 63#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000 64#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 65#undef CONFIG_SPL_BSS_START_ADDR 66#undef CONFIG_SPL_BSS_MAX_SIZE 67#define CONFIG_SPL_BSS_START_ADDR 0x20000 68#define CONFIG_SPL_BSS_MAX_SIZE 0x8000 69 70#endif /* __CONFIG_ZYNQ_CSE_H */ 71