LXR uboot/include/fpga.h

   1/*
   2 * (C) Copyright 2002
   3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <linux/types.h>               /* for ulong typedef */
   9
  10#ifndef _FPGA_H_
  11#define _FPGA_H_
  12
  13#ifndef CONFIG_MAX_FPGA_DEVICES
  14#define CONFIG_MAX_FPGA_DEVICES         5
  15#endif
  16
  17/* fpga_xxxx function return value definitions */
  18#define FPGA_SUCCESS            0
  19#define FPGA_FAIL               -1
  20
  21/* device numbers must be non-negative */
  22#define FPGA_INVALID_DEVICE     -1
  23
  24/* root data type defintions */
  25typedef enum {                  /* typedef fpga_type */
  26        fpga_min_type,          /* range check value */
  27        fpga_xilinx,            /* Xilinx Family) */
  28        fpga_altera,            /* unimplemented */
  29        fpga_lattice,           /* Lattice family */
  30        fpga_undefined          /* invalid range check value */
  31} fpga_type;                    /* end, typedef fpga_type */
  32
  33typedef struct {                /* typedef fpga_desc */
  34        fpga_type devtype;      /* switch value to select sub-functions */
  35        void *devdesc;          /* real device descriptor */
  36} fpga_desc;                    /* end, typedef fpga_desc */
  37
  38typedef struct {                /* typedef fpga_desc */
  39        unsigned int blocksize;
  40        char *interface;
  41        char *dev_part;
  42        char *filename;
  43        int fstype;
  44} fpga_fs_info;
  45
  46typedef struct {
  47        char *keyaddr_size;
  48        char *ivaddr_size;
  49        char sec_img_type;
  50} fpga_secure_info;
  51
  52typedef enum {
  53        BIT_FULL = 0,
  54        BIT_PARTIAL,
  55        BIT_NONE = 0xFF,
  56} bitstream_type;
  57
  58/* root function definitions */
  59void fpga_init(void);
  60int fpga_add(fpga_type devtype, void *desc);
  61int fpga_count(void);
  62const fpga_desc *const fpga_get_desc(int devnum);
  63int fpga_load(int devnum, const void *buf, size_t bsize,
  64              bitstream_type bstype);
  65int fpga_fsload(int devnum, const void *buf, size_t size,
  66                fpga_fs_info *fpga_fsinfo);
  67int fpga_loads(int devnum, const void *buf, size_t size,
  68               fpga_secure_info *fpga_sec_info);
  69int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
  70                       bitstream_type bstype);
  71int fpga_dump(int devnum, const void *buf, size_t bsize);
  72int fpga_info(int devnum);
  73const fpga_desc *const fpga_validate(int devnum, const void *buf,
  74                                     size_t bsize, char *fn);
  75
  76#endif  /* _FPGA_H_ */
  77