1Overview 2-------- 3P1_P2_RDB_PC represents a set of boards including 4 P1020MSBG-PC 5 P1020RDB-PC 6 P1020RDB-PD 7 P1020UTM-PC 8 P1021RDB-PC 9 P1024RDB 10 P1025RDB 11 P2020RDB-PC 12 13They have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC 14has 64-bit DDR. All others have 32-bit DDR. 15 16Key features on these boards include: 17 * DDR3 18 * NOR flash 19 * NAND flash (on RDB's only) 20 * SPI flash (on RDB's only) 21 * SDHC/MMC card slot 22 * VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB) 23 * PCIE slot and mini-PCIE slots 24 25As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM 26is used to store SPD data. In case of absent or corrupted SPD, falling back 27to timing data embedded in the source code will be used. Raw timing data is 28extracted from DDR chip datasheet. Different speeds of DDR are supported with 29this approach. ODT option is forced to fit this set of boards, again because 30they don't have regular DIMMs. 31 32CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification 33for writing timing. 34 35VSC firmware Address is defined by default in config file for eTSEC1. 36 37SD width is based off DIP switch. DIP switch is detected on the 38board by reading i2c bus and setting the appropriate mux values. 39 40Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have 41pins multiplexing. QE function needs to be disabled to access Nor Flash and 42CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe" 43in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to 44enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below 45 46'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD. 47'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD. 48