uboot/drivers/usb/host/ohci-hcd.c
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   1/*
   2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3 *
   4 * Interrupt support is added. Now, it has been tested
   5 * on ULI1575 chip and works well with USB keyboard.
   6 *
   7 * (C) Copyright 2007
   8 * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9 *
  10 * (C) Copyright 2003
  11 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12 *
  13 * Note: Much of this code has been derived from Linux 2.4
  14 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15 * (C) Copyright 2000-2002 David Brownell
  16 *
  17 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18 * ebenard@eukrea.com - based on s3c24x0's driver
  19 *
  20 * SPDX-License-Identifier:     GPL-2.0+
  21 */
  22/*
  23 * IMPORTANT NOTES
  24 * 1 - Read doc/README.generic_usb_ohci
  25 * 2 - this driver is intended for use with USB Mass Storage Devices
  26 *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28 *     to activate workaround for bug #41 or this driver will NOT work!
  29 */
  30
  31#include <common.h>
  32#include <asm/byteorder.h>
  33#include <dm.h>
  34#include <errno.h>
  35
  36#if defined(CONFIG_PCI_OHCI)
  37# include <pci.h>
  38#if !defined(CONFIG_PCI_OHCI_DEVNO)
  39#define CONFIG_PCI_OHCI_DEVNO   0
  40#endif
  41#endif
  42
  43#include <malloc.h>
  44#include <memalign.h>
  45#include <usb.h>
  46
  47#include "ohci.h"
  48
  49#ifdef CONFIG_AT91RM9200
  50#include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  51#endif
  52
  53#if defined(CONFIG_CPU_ARM920T) || \
  54    defined(CONFIG_PCI_OHCI) || \
  55    defined(CONFIG_SYS_OHCI_USE_NPS)
  56# define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  57#endif
  58
  59#undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  60#undef DEBUG
  61#undef SHOW_INFO
  62#undef OHCI_FILL_TRACE
  63
  64/* For initializing controller (mask in an HCFS mode too) */
  65#define OHCI_CONTROL_INIT \
  66        (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  67
  68#ifdef CONFIG_PCI_OHCI
  69static struct pci_device_id ohci_pci_ids[] = {
  70        {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  71        {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  72        {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  73        /* Please add supported PCI OHCI controller ids here */
  74        {0, 0}
  75};
  76#endif
  77
  78#ifdef CONFIG_PCI_EHCI_DEVNO
  79static struct pci_device_id ehci_pci_ids[] = {
  80        {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  81        /* Please add supported PCI EHCI controller ids here */
  82        {0, 0}
  83};
  84#endif
  85
  86#ifdef DEBUG
  87#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  88#else
  89#define dbg(format, arg...) do {} while (0)
  90#endif /* DEBUG */
  91#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  92#ifdef SHOW_INFO
  93#define info(format, arg...) printf("INFO: " format "\n", ## arg)
  94#else
  95#define info(format, arg...) do {} while (0)
  96#endif
  97
  98#ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
  99# define m16_swap(x) cpu_to_be16(x)
 100# define m32_swap(x) cpu_to_be32(x)
 101#else
 102# define m16_swap(x) cpu_to_le16(x)
 103# define m32_swap(x) cpu_to_le32(x)
 104#endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 105
 106/* We really should do proper cache flushing everywhere */
 107#define flush_dcache_buffer(addr, size) \
 108        flush_dcache_range((unsigned long)(addr), \
 109                ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 110#define invalidate_dcache_buffer(addr, size) \
 111        invalidate_dcache_range((unsigned long)(addr), \
 112                ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 113
 114/* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 115#define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
 116#define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
 117#define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
 118#define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
 119#define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
 120#define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
 121#define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
 122#define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 123
 124#ifdef CONFIG_DM_USB
 125/*
 126 * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
 127 * them around when building for older boards not yet converted to the dm
 128 * just in case (to avoid regressions), for dm this turns them into nops.
 129 */
 130#define ohci_mdelay(x)
 131#else
 132#define ohci_mdelay(x) mdelay(x)
 133#endif
 134
 135#ifndef CONFIG_DM_USB
 136/* global ohci_t */
 137static ohci_t gohci;
 138/* this must be aligned to a 256 byte boundary */
 139struct ohci_hcca ghcca[1];
 140#endif
 141
 142/* mapping of the OHCI CC status to error codes */
 143static int cc_to_error[16] = {
 144        /* No  Error  */               0,
 145        /* CRC Error  */               USB_ST_CRC_ERR,
 146        /* Bit Stuff  */               USB_ST_BIT_ERR,
 147        /* Data Togg  */               USB_ST_CRC_ERR,
 148        /* Stall      */               USB_ST_STALLED,
 149        /* DevNotResp */               -1,
 150        /* PIDCheck   */               USB_ST_BIT_ERR,
 151        /* UnExpPID   */               USB_ST_BIT_ERR,
 152        /* DataOver   */               USB_ST_BUF_ERR,
 153        /* DataUnder  */               USB_ST_BUF_ERR,
 154        /* reservd    */               -1,
 155        /* reservd    */               -1,
 156        /* BufferOver */               USB_ST_BUF_ERR,
 157        /* BuffUnder  */               USB_ST_BUF_ERR,
 158        /* Not Access */               -1,
 159        /* Not Access */               -1
 160};
 161
 162static const char *cc_to_string[16] = {
 163        "No Error",
 164        "CRC: Last data packet from endpoint contained a CRC error.",
 165        "BITSTUFFING: Last data packet from endpoint contained a bit " \
 166                     "stuffing violation",
 167        "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 168                     "that did not match the expected value.",
 169        "STALL: TD was moved to the Done Queue because the endpoint returned" \
 170                     " a STALL PID",
 171        "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 172                     "not provide a handshake (OUT)",
 173        "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 174                     "(IN) or handshake (OUT)",
 175        "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 176                     "value is not defined.",
 177        "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 178                     "either the size of the maximum data packet allowed\n" \
 179                     "from the endpoint (found in MaximumPacketSize field\n" \
 180                     "of ED) or the remaining buffer size.",
 181        "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 182                     "and that amount was not sufficient to fill the\n" \
 183                     "specified buffer",
 184        "reserved1",
 185        "reserved2",
 186        "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 187                     "than it could be written to system memory",
 188        "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 189                     "system memory fast enough to keep up with data USB " \
 190                     "data rate.",
 191        "NOT ACCESSED: This code is set by software before the TD is placed" \
 192                     "on a list to be processed by the HC.(1)",
 193        "NOT ACCESSED: This code is set by software before the TD is placed" \
 194                     "on a list to be processed by the HC.(2)",
 195};
 196
 197static inline u32 roothub_a(struct ohci *hc)
 198        { return ohci_readl(&hc->regs->roothub.a); }
 199static inline u32 roothub_b(struct ohci *hc)
 200        { return ohci_readl(&hc->regs->roothub.b); }
 201static inline u32 roothub_status(struct ohci *hc)
 202        { return ohci_readl(&hc->regs->roothub.status); }
 203static inline u32 roothub_portstatus(struct ohci *hc, int i)
 204        { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 205
 206/* forward declaration */
 207static int hc_interrupt(ohci_t *ohci);
 208static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 209                          unsigned long pipe, void *buffer, int transfer_len,
 210                          struct devrequest *setup, urb_priv_t *urb,
 211                          int interval);
 212static int ep_link(ohci_t * ohci, ed_t * ed);
 213static int ep_unlink(ohci_t * ohci, ed_t * ed);
 214static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 215                       unsigned long pipe, int interval, int load);
 216
 217/*-------------------------------------------------------------------------*/
 218
 219/* TDs ... */
 220static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 221{
 222        int i;
 223        struct td *td;
 224
 225        td = NULL;
 226        for (i = 0; i < NUM_TD; i++)
 227        {
 228                if (ohci_dev->tds[i].usb_dev == NULL)
 229                {
 230                        td = &ohci_dev->tds[i];
 231                        td->usb_dev = usb_dev;
 232                        break;
 233                }
 234        }
 235
 236        return td;
 237}
 238
 239static inline void ed_free(struct ed *ed)
 240{
 241        ed->usb_dev = NULL;
 242}
 243
 244/*-------------------------------------------------------------------------*
 245 * URB support functions
 246 *-------------------------------------------------------------------------*/
 247
 248/* free HCD-private data associated with this URB */
 249
 250static void urb_free_priv(urb_priv_t *urb)
 251{
 252        int             i;
 253        int             last;
 254        struct td       *td;
 255
 256        last = urb->length - 1;
 257        if (last >= 0) {
 258                for (i = 0; i <= last; i++) {
 259                        td = urb->td[i];
 260                        if (td) {
 261                                td->usb_dev = NULL;
 262                                urb->td[i] = NULL;
 263                        }
 264                }
 265        }
 266        free(urb);
 267}
 268
 269/*-------------------------------------------------------------------------*/
 270
 271#ifdef DEBUG
 272static int sohci_get_current_frame_number(ohci_t *ohci);
 273
 274/* debug| print the main components of an URB
 275 * small: 0) header + data packets 1) just header */
 276
 277static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 278                      unsigned long pipe, void *buffer, int transfer_len,
 279                      struct devrequest *setup, char *str, int small)
 280{
 281        dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 282                        str,
 283                        sohci_get_current_frame_number(ohci),
 284                        usb_pipedevice(pipe),
 285                        usb_pipeendpoint(pipe),
 286                        usb_pipeout(pipe)? 'O': 'I',
 287                        usb_pipetype(pipe) < 2 ? \
 288                                (usb_pipeint(pipe)? "INTR": "ISOC"): \
 289                                (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 290                        (purb ? purb->actual_length : 0),
 291                        transfer_len, dev->status);
 292#ifdef  OHCI_VERBOSE_DEBUG
 293        if (!small) {
 294                int i, len;
 295
 296                if (usb_pipecontrol(pipe)) {
 297                        printf(__FILE__ ": cmd(8):");
 298                        for (i = 0; i < 8 ; i++)
 299                                printf(" %02x", ((__u8 *) setup) [i]);
 300                        printf("\n");
 301                }
 302                if (transfer_len > 0 && buffer) {
 303                        printf(__FILE__ ": data(%d/%d):",
 304                                (purb ? purb->actual_length : 0),
 305                                transfer_len);
 306                        len = usb_pipeout(pipe)? transfer_len:
 307                                        (purb ? purb->actual_length : 0);
 308                        for (i = 0; i < 16 && i < len; i++)
 309                                printf(" %02x", ((__u8 *) buffer) [i]);
 310                        printf("%s\n", i < len? "...": "");
 311                }
 312        }
 313#endif
 314}
 315
 316/* just for debugging; prints non-empty branches of the int ed tree
 317 * inclusive iso eds */
 318void ep_print_int_eds(ohci_t *ohci, char *str)
 319{
 320        int i, j;
 321         __u32 *ed_p;
 322        for (i = 0; i < 32; i++) {
 323                j = 5;
 324                ed_p = &(ohci->hcca->int_table [i]);
 325                if (*ed_p == 0)
 326                    continue;
 327                invalidate_dcache_ed(ed_p);
 328                printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 329                while (*ed_p != 0 && j--) {
 330                        ed_t *ed = (ed_t *)m32_swap(ed_p);
 331                        invalidate_dcache_ed(ed);
 332                        printf(" ed: %4x;", ed->hwINFO);
 333                        ed_p = &ed->hwNextED;
 334                }
 335                printf("\n");
 336        }
 337}
 338
 339static void ohci_dump_intr_mask(char *label, __u32 mask)
 340{
 341        dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 342                label,
 343                mask,
 344                (mask & OHCI_INTR_MIE) ? " MIE" : "",
 345                (mask & OHCI_INTR_OC) ? " OC" : "",
 346                (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 347                (mask & OHCI_INTR_FNO) ? " FNO" : "",
 348                (mask & OHCI_INTR_UE) ? " UE" : "",
 349                (mask & OHCI_INTR_RD) ? " RD" : "",
 350                (mask & OHCI_INTR_SF) ? " SF" : "",
 351                (mask & OHCI_INTR_WDH) ? " WDH" : "",
 352                (mask & OHCI_INTR_SO) ? " SO" : ""
 353                );
 354}
 355
 356static void maybe_print_eds(char *label, __u32 value)
 357{
 358        ed_t *edp = (ed_t *)value;
 359
 360        if (value) {
 361                dbg("%s %08x", label, value);
 362                invalidate_dcache_ed(edp);
 363                dbg("%08x", edp->hwINFO);
 364                dbg("%08x", edp->hwTailP);
 365                dbg("%08x", edp->hwHeadP);
 366                dbg("%08x", edp->hwNextED);
 367        }
 368}
 369
 370static char *hcfs2string(int state)
 371{
 372        switch (state) {
 373        case OHCI_USB_RESET:    return "reset";
 374        case OHCI_USB_RESUME:   return "resume";
 375        case OHCI_USB_OPER:     return "operational";
 376        case OHCI_USB_SUSPEND:  return "suspend";
 377        }
 378        return "?";
 379}
 380
 381/* dump control and status registers */
 382static void ohci_dump_status(ohci_t *controller)
 383{
 384        struct ohci_regs        *regs = controller->regs;
 385        __u32                   temp;
 386
 387        temp = ohci_readl(&regs->revision) & 0xff;
 388        if (temp != 0x10)
 389                dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 390
 391        temp = ohci_readl(&regs->control);
 392        dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 393                (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 394                (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 395                (temp & OHCI_CTRL_IR) ? " IR" : "",
 396                hcfs2string(temp & OHCI_CTRL_HCFS),
 397                (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 398                (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 399                (temp & OHCI_CTRL_IE) ? " IE" : "",
 400                (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 401                temp & OHCI_CTRL_CBSR
 402                );
 403
 404        temp = ohci_readl(&regs->cmdstatus);
 405        dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 406                (temp & OHCI_SOC) >> 16,
 407                (temp & OHCI_OCR) ? " OCR" : "",
 408                (temp & OHCI_BLF) ? " BLF" : "",
 409                (temp & OHCI_CLF) ? " CLF" : "",
 410                (temp & OHCI_HCR) ? " HCR" : ""
 411                );
 412
 413        ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 414        ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 415
 416        maybe_print_eds("ed_periodcurrent",
 417                        ohci_readl(&regs->ed_periodcurrent));
 418
 419        maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 420        maybe_print_eds("ed_controlcurrent",
 421                        ohci_readl(&regs->ed_controlcurrent));
 422
 423        maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 424        maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 425
 426        maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 427}
 428
 429static void ohci_dump_roothub(ohci_t *controller, int verbose)
 430{
 431        __u32                   temp, ndp, i;
 432
 433        temp = roothub_a(controller);
 434        ndp = (temp & RH_A_NDP);
 435#ifdef CONFIG_AT91C_PQFP_UHPBUG
 436        ndp = (ndp == 2) ? 1:0;
 437#endif
 438        if (verbose) {
 439                dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 440                        ((temp & RH_A_POTPGT) >> 24) & 0xff,
 441                        (temp & RH_A_NOCP) ? " NOCP" : "",
 442                        (temp & RH_A_OCPM) ? " OCPM" : "",
 443                        (temp & RH_A_DT) ? " DT" : "",
 444                        (temp & RH_A_NPS) ? " NPS" : "",
 445                        (temp & RH_A_PSM) ? " PSM" : "",
 446                        ndp
 447                        );
 448                temp = roothub_b(controller);
 449                dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 450                        temp,
 451                        (temp & RH_B_PPCM) >> 16,
 452                        (temp & RH_B_DR)
 453                        );
 454                temp = roothub_status(controller);
 455                dbg("roothub.status: %08x%s%s%s%s%s%s",
 456                        temp,
 457                        (temp & RH_HS_CRWE) ? " CRWE" : "",
 458                        (temp & RH_HS_OCIC) ? " OCIC" : "",
 459                        (temp & RH_HS_LPSC) ? " LPSC" : "",
 460                        (temp & RH_HS_DRWE) ? " DRWE" : "",
 461                        (temp & RH_HS_OCI) ? " OCI" : "",
 462                        (temp & RH_HS_LPS) ? " LPS" : ""
 463                        );
 464        }
 465
 466        for (i = 0; i < ndp; i++) {
 467                temp = roothub_portstatus(controller, i);
 468                dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 469                        i,
 470                        temp,
 471                        (temp & RH_PS_PRSC) ? " PRSC" : "",
 472                        (temp & RH_PS_OCIC) ? " OCIC" : "",
 473                        (temp & RH_PS_PSSC) ? " PSSC" : "",
 474                        (temp & RH_PS_PESC) ? " PESC" : "",
 475                        (temp & RH_PS_CSC) ? " CSC" : "",
 476
 477                        (temp & RH_PS_LSDA) ? " LSDA" : "",
 478                        (temp & RH_PS_PPS) ? " PPS" : "",
 479                        (temp & RH_PS_PRS) ? " PRS" : "",
 480                        (temp & RH_PS_POCI) ? " POCI" : "",
 481                        (temp & RH_PS_PSS) ? " PSS" : "",
 482
 483                        (temp & RH_PS_PES) ? " PES" : "",
 484                        (temp & RH_PS_CCS) ? " CCS" : ""
 485                        );
 486        }
 487}
 488
 489static void ohci_dump(ohci_t *controller, int verbose)
 490{
 491        dbg("OHCI controller usb-%s state", controller->slot_name);
 492
 493        /* dumps some of the state we know about */
 494        ohci_dump_status(controller);
 495        if (verbose)
 496                ep_print_int_eds(controller, "hcca");
 497        invalidate_dcache_hcca(controller->hcca);
 498        dbg("hcca frame #%04x", controller->hcca->frame_no);
 499        ohci_dump_roothub(controller, 1);
 500}
 501#endif /* DEBUG */
 502
 503/*-------------------------------------------------------------------------*
 504 * Interface functions (URB)
 505 *-------------------------------------------------------------------------*/
 506
 507/* get a transfer request */
 508
 509int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 510                     struct devrequest *setup)
 511{
 512        ed_t *ed;
 513        urb_priv_t *purb_priv = urb;
 514        int i, size = 0;
 515        struct usb_device *dev = urb->dev;
 516        unsigned long pipe = urb->pipe;
 517        void *buffer = urb->transfer_buffer;
 518        int transfer_len = urb->transfer_buffer_length;
 519        int interval = urb->interval;
 520
 521        /* when controller's hung, permit only roothub cleanup attempts
 522         * such as powering down ports */
 523        if (ohci->disabled) {
 524                err("sohci_submit_job: EPIPE");
 525                return -1;
 526        }
 527
 528        /* we're about to begin a new transaction here so mark the
 529         * URB unfinished */
 530        urb->finished = 0;
 531
 532        /* every endpoint has a ed, locate and fill it */
 533        ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 534        if (!ed) {
 535                err("sohci_submit_job: ENOMEM");
 536                return -1;
 537        }
 538
 539        /* for the private part of the URB we need the number of TDs (size) */
 540        switch (usb_pipetype(pipe)) {
 541        case PIPE_BULK: /* one TD for every 4096 Byte */
 542                size = (transfer_len - 1) / 4096 + 1;
 543                break;
 544        case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 545                size = (transfer_len == 0)? 2:
 546                                        (transfer_len - 1) / 4096 + 3;
 547                break;
 548        case PIPE_INTERRUPT: /* 1 TD */
 549                size = 1;
 550                break;
 551        }
 552
 553        ed->purb = urb;
 554
 555        if (size >= (N_URB_TD - 1)) {
 556                err("need %d TDs, only have %d", size, N_URB_TD);
 557                return -1;
 558        }
 559        purb_priv->pipe = pipe;
 560
 561        /* fill the private part of the URB */
 562        purb_priv->length = size;
 563        purb_priv->ed = ed;
 564        purb_priv->actual_length = 0;
 565
 566        /* allocate the TDs */
 567        /* note that td[0] was allocated in ep_add_ed */
 568        for (i = 0; i < size; i++) {
 569                purb_priv->td[i] = td_alloc(ohci_dev, dev);
 570                if (!purb_priv->td[i]) {
 571                        purb_priv->length = i;
 572                        urb_free_priv(purb_priv);
 573                        err("sohci_submit_job: ENOMEM");
 574                        return -1;
 575                }
 576        }
 577
 578        if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 579                urb_free_priv(purb_priv);
 580                err("sohci_submit_job: EINVAL");
 581                return -1;
 582        }
 583
 584        /* link the ed into a chain if is not already */
 585        if (ed->state != ED_OPER)
 586                ep_link(ohci, ed);
 587
 588        /* fill the TDs and link it to the ed */
 589        td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 590                      setup, purb_priv, interval);
 591
 592        return 0;
 593}
 594
 595/*-------------------------------------------------------------------------*/
 596
 597#ifdef DEBUG
 598/* tell us the current USB frame number */
 599static int sohci_get_current_frame_number(ohci_t *ohci)
 600{
 601        invalidate_dcache_hcca(ohci->hcca);
 602        return m16_swap(ohci->hcca->frame_no);
 603}
 604#endif
 605
 606/*-------------------------------------------------------------------------*
 607 * ED handling functions
 608 *-------------------------------------------------------------------------*/
 609
 610/* search for the right branch to insert an interrupt ed into the int tree
 611 * do some load ballancing;
 612 * returns the branch and
 613 * sets the interval to interval = 2^integer (ld (interval)) */
 614
 615static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 616{
 617        int i, branch = 0;
 618
 619        /* search for the least loaded interrupt endpoint
 620         * branch of all 32 branches
 621         */
 622        for (i = 0; i < 32; i++)
 623                if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 624                        branch = i;
 625
 626        branch = branch % interval;
 627        for (i = branch; i < 32; i += interval)
 628                ohci->ohci_int_load [i] += load;
 629
 630        return branch;
 631}
 632
 633/*-------------------------------------------------------------------------*/
 634
 635/*  2^int( ld (inter)) */
 636
 637static int ep_2_n_interval(int inter)
 638{
 639        int i;
 640        for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 641        return 1 << i;
 642}
 643
 644/*-------------------------------------------------------------------------*/
 645
 646/* the int tree is a binary tree
 647 * in order to process it sequentially the indexes of the branches have to
 648 * be mapped the mapping reverses the bits of a word of num_bits length */
 649static int ep_rev(int num_bits, int word)
 650{
 651        int i, wout = 0;
 652
 653        for (i = 0; i < num_bits; i++)
 654                wout |= (((word >> i) & 1) << (num_bits - i - 1));
 655        return wout;
 656}
 657
 658/*-------------------------------------------------------------------------*
 659 * ED handling functions
 660 *-------------------------------------------------------------------------*/
 661
 662/* link an ed into one of the HC chains */
 663
 664static int ep_link(ohci_t *ohci, ed_t *edi)
 665{
 666        volatile ed_t *ed = edi;
 667        int int_branch;
 668        int i;
 669        int inter;
 670        int interval;
 671        int load;
 672        __u32 *ed_p;
 673
 674        ed->state = ED_OPER;
 675        ed->int_interval = 0;
 676
 677        switch (ed->type) {
 678        case PIPE_CONTROL:
 679                ed->hwNextED = 0;
 680                flush_dcache_ed(ed);
 681                if (ohci->ed_controltail == NULL)
 682                        ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead);
 683                else
 684                        ohci->ed_controltail->hwNextED =
 685                                                   m32_swap((unsigned long)ed);
 686
 687                ed->ed_prev = ohci->ed_controltail;
 688                if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 689                        !ohci->ed_rm_list[1] && !ohci->sleeping) {
 690                        ohci->hc_control |= OHCI_CTRL_CLE;
 691                        ohci_writel(ohci->hc_control, &ohci->regs->control);
 692                }
 693                ohci->ed_controltail = edi;
 694                break;
 695
 696        case PIPE_BULK:
 697                ed->hwNextED = 0;
 698                flush_dcache_ed(ed);
 699                if (ohci->ed_bulktail == NULL)
 700                        ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead);
 701                else
 702                        ohci->ed_bulktail->hwNextED =
 703                                                   m32_swap((unsigned long)ed);
 704
 705                ed->ed_prev = ohci->ed_bulktail;
 706                if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 707                        !ohci->ed_rm_list[1] && !ohci->sleeping) {
 708                        ohci->hc_control |= OHCI_CTRL_BLE;
 709                        ohci_writel(ohci->hc_control, &ohci->regs->control);
 710                }
 711                ohci->ed_bulktail = edi;
 712                break;
 713
 714        case PIPE_INTERRUPT:
 715                load = ed->int_load;
 716                interval = ep_2_n_interval(ed->int_period);
 717                ed->int_interval = interval;
 718                int_branch = ep_int_ballance(ohci, interval, load);
 719                ed->int_branch = int_branch;
 720
 721                for (i = 0; i < ep_rev(6, interval); i += inter) {
 722                        inter = 1;
 723                        for (ed_p = &(ohci->hcca->int_table[\
 724                                                ep_rev(5, i) + int_branch]);
 725                                (*ed_p != 0) &&
 726                                (((ed_t *)ed_p)->int_interval >= interval);
 727                                ed_p = &(((ed_t *)ed_p)->hwNextED))
 728                                        inter = ep_rev(6,
 729                                                 ((ed_t *)ed_p)->int_interval);
 730                        ed->hwNextED = *ed_p;
 731                        flush_dcache_ed(ed);
 732                        *ed_p = m32_swap((unsigned long)ed);
 733                        flush_dcache_hcca(ohci->hcca);
 734                }
 735                break;
 736        }
 737        return 0;
 738}
 739
 740/*-------------------------------------------------------------------------*/
 741
 742/* scan the periodic table to find and unlink this ED */
 743static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 744                            unsigned index, unsigned period)
 745{
 746        __maybe_unused unsigned long aligned_ed_p;
 747
 748        for (; index < NUM_INTS; index += period) {
 749                __u32   *ed_p = &ohci->hcca->int_table [index];
 750
 751                /* ED might have been unlinked through another path */
 752                while (*ed_p != 0) {
 753                        if (((struct ed *)(uintptr_t)
 754                                        m32_swap((unsigned long)ed_p)) == ed) {
 755                                *ed_p = ed->hwNextED;
 756                                aligned_ed_p = (unsigned long)ed_p;
 757                                aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 758                                flush_dcache_range(aligned_ed_p,
 759                                        aligned_ed_p + ARCH_DMA_MINALIGN);
 760                                break;
 761                        }
 762                        ed_p = &(((struct ed *)(uintptr_t)
 763                                     m32_swap((unsigned long)ed_p))->hwNextED);
 764                }
 765        }
 766}
 767
 768/* unlink an ed from one of the HC chains.
 769 * just the link to the ed is unlinked.
 770 * the link from the ed still points to another operational ed or 0
 771 * so the HC can eventually finish the processing of the unlinked ed */
 772
 773static int ep_unlink(ohci_t *ohci, ed_t *edi)
 774{
 775        volatile ed_t *ed = edi;
 776        int i;
 777
 778        ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 779        flush_dcache_ed(ed);
 780
 781        switch (ed->type) {
 782        case PIPE_CONTROL:
 783                if (ed->ed_prev == NULL) {
 784                        if (!ed->hwNextED) {
 785                                ohci->hc_control &= ~OHCI_CTRL_CLE;
 786                                ohci_writel(ohci->hc_control,
 787                                            &ohci->regs->control);
 788                        }
 789                        ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 790                                &ohci->regs->ed_controlhead);
 791                } else {
 792                        ed->ed_prev->hwNextED = ed->hwNextED;
 793                        flush_dcache_ed(ed->ed_prev);
 794                }
 795                if (ohci->ed_controltail == ed) {
 796                        ohci->ed_controltail = ed->ed_prev;
 797                } else {
 798                        ((ed_t *)(uintptr_t)m32_swap(
 799                            *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 800                }
 801                break;
 802
 803        case PIPE_BULK:
 804                if (ed->ed_prev == NULL) {
 805                        if (!ed->hwNextED) {
 806                                ohci->hc_control &= ~OHCI_CTRL_BLE;
 807                                ohci_writel(ohci->hc_control,
 808                                            &ohci->regs->control);
 809                        }
 810                        ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 811                               &ohci->regs->ed_bulkhead);
 812                } else {
 813                        ed->ed_prev->hwNextED = ed->hwNextED;
 814                        flush_dcache_ed(ed->ed_prev);
 815                }
 816                if (ohci->ed_bulktail == ed) {
 817                        ohci->ed_bulktail = ed->ed_prev;
 818                } else {
 819                        ((ed_t *)(uintptr_t)m32_swap(
 820                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 821                }
 822                break;
 823
 824        case PIPE_INTERRUPT:
 825                periodic_unlink(ohci, ed, 0, 1);
 826                for (i = ed->int_branch; i < 32; i += ed->int_interval)
 827                    ohci->ohci_int_load[i] -= ed->int_load;
 828                break;
 829        }
 830        ed->state = ED_UNLINK;
 831        return 0;
 832}
 833
 834/*-------------------------------------------------------------------------*/
 835
 836/* add/reinit an endpoint; this should be done once at the
 837 * usb_set_configuration command, but the USB stack is a little bit
 838 * stateless so we do it at every transaction if the state of the ed
 839 * is ED_NEW then a dummy td is added and the state is changed to
 840 * ED_UNLINK in all other cases the state is left unchanged the ed
 841 * info fields are setted anyway even though most of them should not
 842 * change
 843 */
 844static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 845                       unsigned long pipe, int interval, int load)
 846{
 847        td_t *td;
 848        ed_t *ed_ret;
 849        volatile ed_t *ed;
 850
 851        ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 852                        (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 853
 854        if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 855                err("ep_add_ed: pending delete");
 856                /* pending delete request */
 857                return NULL;
 858        }
 859
 860        if (ed->state == ED_NEW) {
 861                /* dummy td; end of td list for ed */
 862                td = td_alloc(ohci_dev, usb_dev);
 863                ed->hwTailP = m32_swap((unsigned long)td);
 864                ed->hwHeadP = ed->hwTailP;
 865                ed->state = ED_UNLINK;
 866                ed->type = usb_pipetype(pipe);
 867                ohci_dev->ed_cnt++;
 868        }
 869
 870        ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 871                        | usb_pipeendpoint(pipe) << 7
 872                        | (usb_pipeisoc(pipe)? 0x8000: 0)
 873                        | (usb_pipecontrol(pipe)? 0: \
 874                                           (usb_pipeout(pipe)? 0x800: 0x1000))
 875                        | (usb_dev->speed == USB_SPEED_LOW) << 13
 876                        | usb_maxpacket(usb_dev, pipe) << 16);
 877
 878        if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 879                ed->int_period = interval;
 880                ed->int_load = load;
 881        }
 882
 883        flush_dcache_ed(ed);
 884
 885        return ed_ret;
 886}
 887
 888/*-------------------------------------------------------------------------*
 889 * TD handling functions
 890 *-------------------------------------------------------------------------*/
 891
 892/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 893
 894static void td_fill(ohci_t *ohci, unsigned int info,
 895        void *data, int len,
 896        struct usb_device *dev, int index, urb_priv_t *urb_priv)
 897{
 898        volatile td_t  *td, *td_pt;
 899#ifdef OHCI_FILL_TRACE
 900        int i;
 901#endif
 902
 903        if (index > urb_priv->length) {
 904                err("index > length");
 905                return;
 906        }
 907        /* use this td as the next dummy */
 908        td_pt = urb_priv->td [index];
 909        td_pt->hwNextTD = 0;
 910        flush_dcache_td(td_pt);
 911
 912        /* fill the old dummy TD */
 913        td = urb_priv->td [index] =
 914                             (td_t *)(uintptr_t)
 915                             (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 916
 917        td->ed = urb_priv->ed;
 918        td->next_dl_td = NULL;
 919        td->index = index;
 920        td->data = (uintptr_t)data;
 921#ifdef OHCI_FILL_TRACE
 922        if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 923                for (i = 0; i < len; i++)
 924                printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 925                printf("\n");
 926        }
 927#endif
 928        if (!len)
 929                data = 0;
 930
 931        td->hwINFO = m32_swap(info);
 932        td->hwCBP = m32_swap((unsigned long)data);
 933        if (data)
 934                td->hwBE = m32_swap((unsigned long)(data + len - 1));
 935        else
 936                td->hwBE = 0;
 937
 938        td->hwNextTD = m32_swap((unsigned long)td_pt);
 939        flush_dcache_td(td);
 940
 941        /* append to queue */
 942        td->ed->hwTailP = td->hwNextTD;
 943        flush_dcache_ed(td->ed);
 944}
 945
 946/*-------------------------------------------------------------------------*/
 947
 948/* prepare all TDs of a transfer */
 949
 950static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 951                          unsigned long pipe, void *buffer, int transfer_len,
 952                          struct devrequest *setup, urb_priv_t *urb,
 953                          int interval)
 954{
 955        int data_len = transfer_len;
 956        void *data;
 957        int cnt = 0;
 958        __u32 info = 0;
 959        unsigned int toggle = 0;
 960
 961        flush_dcache_buffer(buffer, data_len);
 962
 963        /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 964         * bits for resetting */
 965        if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 966                toggle = TD_T_TOGGLE;
 967        } else {
 968                toggle = TD_T_DATA0;
 969                usb_settoggle(dev, usb_pipeendpoint(pipe),
 970                                usb_pipeout(pipe), 1);
 971        }
 972        urb->td_cnt = 0;
 973        if (data_len)
 974                data = buffer;
 975        else
 976                data = 0;
 977
 978        switch (usb_pipetype(pipe)) {
 979        case PIPE_BULK:
 980                info = usb_pipeout(pipe)?
 981                        TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 982                while (data_len > 4096) {
 983                        td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 984                                data, 4096, dev, cnt, urb);
 985                        data += 4096; data_len -= 4096; cnt++;
 986                }
 987                info = usb_pipeout(pipe)?
 988                        TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 989                td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 990                        data_len, dev, cnt, urb);
 991                cnt++;
 992
 993                if (!ohci->sleeping) {
 994                        /* start bulk list */
 995                        ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 996                }
 997                break;
 998
 999        case PIPE_CONTROL:
1000                /* Setup phase */
1001                info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1002                flush_dcache_buffer(setup, 8);
1003                td_fill(ohci, info, setup, 8, dev, cnt++, urb);
1004
1005                /* Optional Data phase */
1006                if (data_len > 0) {
1007                        info = usb_pipeout(pipe)?
1008                                TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
1009                                TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1010                        /* NOTE:  mishandles transfers >8K, some >4K */
1011                        td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1012                }
1013
1014                /* Status phase */
1015                info = (usb_pipeout(pipe) || data_len == 0) ?
1016                        TD_CC | TD_DP_IN | TD_T_DATA1:
1017                        TD_CC | TD_DP_OUT | TD_T_DATA1;
1018                td_fill(ohci, info, data, 0, dev, cnt++, urb);
1019
1020                if (!ohci->sleeping) {
1021                        /* start Control list */
1022                        ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1023                }
1024                break;
1025
1026        case PIPE_INTERRUPT:
1027                info = usb_pipeout(urb->pipe)?
1028                        TD_CC | TD_DP_OUT | toggle:
1029                        TD_CC | TD_R | TD_DP_IN | toggle;
1030                td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1031                break;
1032        }
1033        if (urb->length != cnt)
1034                dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1035}
1036
1037/*-------------------------------------------------------------------------*
1038 * Done List handling functions
1039 *-------------------------------------------------------------------------*/
1040
1041/* calculate the transfer length and update the urb */
1042
1043static void dl_transfer_length(td_t *td)
1044{
1045        __u32 tdBE, tdCBP;
1046        urb_priv_t *lurb_priv = td->ed->purb;
1047
1048        tdBE   = m32_swap(td->hwBE);
1049        tdCBP  = m32_swap(td->hwCBP);
1050
1051        if (!(usb_pipecontrol(lurb_priv->pipe) &&
1052            ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1053                if (tdBE != 0) {
1054                        if (td->hwCBP == 0)
1055                                lurb_priv->actual_length += tdBE - td->data + 1;
1056                        else
1057                                lurb_priv->actual_length += tdCBP - td->data;
1058                }
1059        }
1060}
1061
1062/*-------------------------------------------------------------------------*/
1063static void check_status(td_t *td_list)
1064{
1065        urb_priv_t *lurb_priv = td_list->ed->purb;
1066        int        urb_len    = lurb_priv->length;
1067        __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1068        int        cc;
1069
1070        cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1071        if (cc) {
1072                err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1073
1074                invalidate_dcache_ed(td_list->ed);
1075                if (*phwHeadP & m32_swap(0x1)) {
1076                        if (lurb_priv &&
1077                            ((td_list->index + 1) < urb_len)) {
1078                                *phwHeadP =
1079                                        (lurb_priv->td[urb_len - 1]->hwNextTD &\
1080                                                        m32_swap(0xfffffff0)) |
1081                                                   (*phwHeadP & m32_swap(0x2));
1082
1083                                lurb_priv->td_cnt += urb_len -
1084                                                     td_list->index - 1;
1085                        } else
1086                                *phwHeadP &= m32_swap(0xfffffff2);
1087                        flush_dcache_ed(td_list->ed);
1088                }
1089        }
1090}
1091
1092/* replies to the request have to be on a FIFO basis so
1093 * we reverse the reversed done-list */
1094static td_t *dl_reverse_done_list(ohci_t *ohci)
1095{
1096        uintptr_t td_list_hc;
1097        td_t *td_rev = NULL;
1098        td_t *td_list = NULL;
1099
1100        invalidate_dcache_hcca(ohci->hcca);
1101        td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1102        ohci->hcca->done_head = 0;
1103        flush_dcache_hcca(ohci->hcca);
1104
1105        while (td_list_hc) {
1106                td_list = (td_t *)td_list_hc;
1107                invalidate_dcache_td(td_list);
1108                check_status(td_list);
1109                td_list->next_dl_td = td_rev;
1110                td_rev = td_list;
1111                td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1112        }
1113        return td_list;
1114}
1115
1116/*-------------------------------------------------------------------------*/
1117/*-------------------------------------------------------------------------*/
1118
1119static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1120{
1121        if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1122                urb->finished = 1;
1123        else
1124                dbg("finish_urb: strange.., ED state %x, \n", status);
1125}
1126
1127/*
1128 * Used to take back a TD from the host controller. This would normally be
1129 * called from within dl_done_list, however it may be called directly if the
1130 * HC no longer sees the TD and it has not appeared on the donelist (after
1131 * two frames).  This bug has been observed on ZF Micro systems.
1132 */
1133static int takeback_td(ohci_t *ohci, td_t *td_list)
1134{
1135        ed_t *ed;
1136        int cc;
1137        int stat = 0;
1138        /* urb_t *urb; */
1139        urb_priv_t *lurb_priv;
1140        __u32 tdINFO, edHeadP, edTailP;
1141
1142        invalidate_dcache_td(td_list);
1143        tdINFO = m32_swap(td_list->hwINFO);
1144
1145        ed = td_list->ed;
1146        lurb_priv = ed->purb;
1147
1148        dl_transfer_length(td_list);
1149
1150        lurb_priv->td_cnt++;
1151
1152        /* error code of transfer */
1153        cc = TD_CC_GET(tdINFO);
1154        if (cc) {
1155                err("USB-error: %s (%x)", cc_to_string[cc], cc);
1156                stat = cc_to_error[cc];
1157        }
1158
1159        /* see if this done list makes for all TD's of current URB,
1160        * and mark the URB finished if so */
1161        if (lurb_priv->td_cnt == lurb_priv->length)
1162                finish_urb(ohci, lurb_priv, ed->state);
1163
1164        dbg("dl_done_list: processing TD %x, len %x\n",
1165                lurb_priv->td_cnt, lurb_priv->length);
1166
1167        if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1168                invalidate_dcache_ed(ed);
1169                edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1170                edTailP = m32_swap(ed->hwTailP);
1171
1172                /* unlink eds if they are not busy */
1173                if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1174                        ep_unlink(ohci, ed);
1175        }
1176        return stat;
1177}
1178
1179static int dl_done_list(ohci_t *ohci)
1180{
1181        int stat = 0;
1182        td_t    *td_list = dl_reverse_done_list(ohci);
1183
1184        while (td_list) {
1185                td_t    *td_next = td_list->next_dl_td;
1186                stat = takeback_td(ohci, td_list);
1187                td_list = td_next;
1188        }
1189        return stat;
1190}
1191
1192/*-------------------------------------------------------------------------*
1193 * Virtual Root Hub
1194 *-------------------------------------------------------------------------*/
1195
1196#include <usbroothubdes.h>
1197
1198/* Hub class-specific descriptor is constructed dynamically */
1199
1200/*-------------------------------------------------------------------------*/
1201
1202#define OK(x)                   len = (x); break
1203#ifdef DEBUG
1204#define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1205                                                &ohci->regs->roothub.status); }
1206#define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1207        (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1208#else
1209#define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1210#define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1211                                    &ohci->regs->roothub.portstatus[wIndex-1])
1212#endif
1213#define RD_RH_STAT              roothub_status(ohci)
1214#define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1215
1216/* request to virtual root hub */
1217
1218int rh_check_port_status(ohci_t *controller)
1219{
1220        __u32 temp, ndp, i;
1221        int res;
1222
1223        res = -1;
1224        temp = roothub_a(controller);
1225        ndp = (temp & RH_A_NDP);
1226#ifdef CONFIG_AT91C_PQFP_UHPBUG
1227        ndp = (ndp == 2) ? 1:0;
1228#endif
1229        for (i = 0; i < ndp; i++) {
1230                temp = roothub_portstatus(controller, i);
1231                /* check for a device disconnect */
1232                if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1233                        (RH_PS_PESC | RH_PS_CSC)) &&
1234                        ((temp & RH_PS_CCS) == 0)) {
1235                        res = i;
1236                        break;
1237                }
1238        }
1239        return res;
1240}
1241
1242static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1243        unsigned long pipe, void *buffer, int transfer_len,
1244        struct devrequest *cmd)
1245{
1246        void *data = buffer;
1247        int leni = transfer_len;
1248        int len = 0;
1249        int stat = 0;
1250        __u16 bmRType_bReq;
1251        __u16 wValue;
1252        __u16 wIndex;
1253        __u16 wLength;
1254        ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1255
1256#ifdef DEBUG
1257pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1258          cmd, "SUB(rh)", usb_pipein(pipe));
1259#else
1260        ohci_mdelay(1);
1261#endif
1262        if (usb_pipeint(pipe)) {
1263                info("Root-Hub submit IRQ: NOT implemented");
1264                return 0;
1265        }
1266
1267        bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1268        wValue        = le16_to_cpu(cmd->value);
1269        wIndex        = le16_to_cpu(cmd->index);
1270        wLength       = le16_to_cpu(cmd->length);
1271
1272        info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1273                dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1274
1275        switch (bmRType_bReq) {
1276        /* Request Destination:
1277           without flags: Device,
1278           RH_INTERFACE: interface,
1279           RH_ENDPOINT: endpoint,
1280           RH_CLASS means HUB here,
1281           RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1282        */
1283
1284        case RH_GET_STATUS:
1285                *(u16 *)databuf = cpu_to_le16(1);
1286                OK(2);
1287        case RH_GET_STATUS | RH_INTERFACE:
1288                *(u16 *)databuf = cpu_to_le16(0);
1289                OK(2);
1290        case RH_GET_STATUS | RH_ENDPOINT:
1291                *(u16 *)databuf = cpu_to_le16(0);
1292                OK(2);
1293        case RH_GET_STATUS | RH_CLASS:
1294                *(u32 *)databuf = cpu_to_le32(
1295                                RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1296                OK(4);
1297        case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1298                *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1299                OK(4);
1300
1301        case RH_CLEAR_FEATURE | RH_ENDPOINT:
1302                switch (wValue) {
1303                case (RH_ENDPOINT_STALL):
1304                        OK(0);
1305                }
1306                break;
1307
1308        case RH_CLEAR_FEATURE | RH_CLASS:
1309                switch (wValue) {
1310                case RH_C_HUB_LOCAL_POWER:
1311                        OK(0);
1312                case (RH_C_HUB_OVER_CURRENT):
1313                        WR_RH_STAT(RH_HS_OCIC);
1314                        OK(0);
1315                }
1316                break;
1317
1318        case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1319                switch (wValue) {
1320                case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1321                case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1322                case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1323                case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1324                case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1325                case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1326                case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1327                case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1328                }
1329                break;
1330
1331        case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1332                switch (wValue) {
1333                case (RH_PORT_SUSPEND):
1334                        WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1335                case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1336                        if (RD_RH_PORTSTAT & RH_PS_CCS)
1337                                WR_RH_PORTSTAT(RH_PS_PRS);
1338                        OK(0);
1339                case (RH_PORT_POWER):
1340                        WR_RH_PORTSTAT(RH_PS_PPS);
1341                        OK(0);
1342                case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1343                        if (RD_RH_PORTSTAT & RH_PS_CCS)
1344                                WR_RH_PORTSTAT(RH_PS_PES);
1345                        OK(0);
1346                }
1347                break;
1348
1349        case RH_SET_ADDRESS:
1350                ohci->rh.devnum = wValue;
1351                OK(0);
1352
1353        case RH_GET_DESCRIPTOR:
1354                switch ((wValue & 0xff00) >> 8) {
1355                case (0x01): /* device descriptor */
1356                        len = min_t(unsigned int,
1357                                        leni,
1358                                        min_t(unsigned int,
1359                                        sizeof(root_hub_dev_des),
1360                                        wLength));
1361                        databuf = root_hub_dev_des; OK(len);
1362                case (0x02): /* configuration descriptor */
1363                        len = min_t(unsigned int,
1364                                        leni,
1365                                        min_t(unsigned int,
1366                                        sizeof(root_hub_config_des),
1367                                        wLength));
1368                        databuf = root_hub_config_des; OK(len);
1369                case (0x03): /* string descriptors */
1370                        if (wValue == 0x0300) {
1371                                len = min_t(unsigned int,
1372                                                leni,
1373                                                min_t(unsigned int,
1374                                                sizeof(root_hub_str_index0),
1375                                                wLength));
1376                                databuf = root_hub_str_index0;
1377                                OK(len);
1378                        }
1379                        if (wValue == 0x0301) {
1380                                len = min_t(unsigned int,
1381                                                leni,
1382                                                min_t(unsigned int,
1383                                                sizeof(root_hub_str_index1),
1384                                                wLength));
1385                                databuf = root_hub_str_index1;
1386                                OK(len);
1387                }
1388                default:
1389                        stat = USB_ST_STALLED;
1390                }
1391                break;
1392
1393        case RH_GET_DESCRIPTOR | RH_CLASS:
1394        {
1395                __u32 temp = roothub_a(ohci);
1396
1397                databuf[0] = 9;         /* min length; */
1398                databuf[1] = 0x29;
1399                databuf[2] = temp & RH_A_NDP;
1400#ifdef CONFIG_AT91C_PQFP_UHPBUG
1401                databuf[2] = (databuf[2] == 2) ? 1 : 0;
1402#endif
1403                databuf[3] = 0;
1404                if (temp & RH_A_PSM)    /* per-port power switching? */
1405                        databuf[3] |= 0x1;
1406                if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1407                        databuf[3] |= 0x10;
1408                else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1409                        databuf[3] |= 0x8;
1410
1411                databuf[4] = 0;
1412                databuf[5] = (temp & RH_A_POTPGT) >> 24;
1413                databuf[6] = 0;
1414                temp = roothub_b(ohci);
1415                databuf[7] = temp & RH_B_DR;
1416                if (databuf[2] < 7) {
1417                        databuf[8] = 0xff;
1418                } else {
1419                        databuf[0] += 2;
1420                        databuf[8] = (temp & RH_B_DR) >> 8;
1421                        databuf[10] = databuf[9] = 0xff;
1422                }
1423
1424                len = min_t(unsigned int, leni,
1425                            min_t(unsigned int, databuf[0], wLength));
1426                OK(len);
1427        }
1428
1429        case RH_GET_CONFIGURATION:
1430                databuf[0] = 0x01;
1431                OK(1);
1432
1433        case RH_SET_CONFIGURATION:
1434                WR_RH_STAT(0x10000);
1435                OK(0);
1436
1437        default:
1438                dbg("unsupported root hub command");
1439                stat = USB_ST_STALLED;
1440        }
1441
1442#ifdef  DEBUG
1443        ohci_dump_roothub(ohci, 1);
1444#else
1445        ohci_mdelay(1);
1446#endif
1447
1448        len = min_t(int, len, leni);
1449        if (data != databuf)
1450                memcpy(data, databuf, len);
1451        dev->act_len = len;
1452        dev->status = stat;
1453
1454#ifdef DEBUG
1455        pkt_print(ohci, NULL, dev, pipe, buffer,
1456                  transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1457#else
1458        ohci_mdelay(1);
1459#endif
1460
1461        return stat;
1462}
1463
1464/*-------------------------------------------------------------------------*/
1465
1466static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1467{
1468        int i;
1469
1470        if (!intr)
1471                return &ohci->ohci_dev;
1472
1473        /* First see if we already have an ohci_dev for this dev. */
1474        for (i = 0; i < NUM_INT_DEVS; i++) {
1475                if (ohci->int_dev[i].devnum == devnum)
1476                        return &ohci->int_dev[i];
1477        }
1478
1479        /* If not then find a free one. */
1480        for (i = 0; i < NUM_INT_DEVS; i++) {
1481                if (ohci->int_dev[i].devnum == -1) {
1482                        ohci->int_dev[i].devnum = devnum;
1483                        return &ohci->int_dev[i];
1484                }
1485        }
1486
1487        printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1488        return NULL;
1489}
1490
1491/* common code for handling submit messages - used for all but root hub */
1492/* accesses. */
1493static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1494                void *buffer, int transfer_len, int interval)
1495{
1496        urb_priv_t *urb;
1497
1498        urb = calloc(1, sizeof(urb_priv_t));
1499        if (!urb) {
1500                printf("ohci: Error out of memory allocating urb\n");
1501                return NULL;
1502        }
1503
1504        urb->dev = dev;
1505        urb->pipe = pipe;
1506        urb->transfer_buffer = buffer;
1507        urb->transfer_buffer_length = transfer_len;
1508        urb->interval = interval;
1509
1510        return urb;
1511}
1512
1513static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1514                unsigned long pipe, void *buffer, int transfer_len,
1515                struct devrequest *setup, int interval)
1516{
1517        int stat = 0;
1518        int maxsize = usb_maxpacket(dev, pipe);
1519        int timeout;
1520        urb_priv_t *urb;
1521        ohci_dev_t *ohci_dev;
1522
1523        urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1524        if (!urb)
1525                return -ENOMEM;
1526
1527#ifdef DEBUG
1528        urb->actual_length = 0;
1529        pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1530                  setup, "SUB", usb_pipein(pipe));
1531#else
1532        ohci_mdelay(1);
1533#endif
1534        if (!maxsize) {
1535                err("submit_common_message: pipesize for pipe %lx is zero",
1536                        pipe);
1537                return -1;
1538        }
1539
1540        ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1541        if (!ohci_dev)
1542                return -ENOMEM;
1543
1544        if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1545                err("sohci_submit_job failed");
1546                return -1;
1547        }
1548
1549#if 0
1550        mdelay(10);
1551        /* ohci_dump_status(ohci); */
1552#endif
1553
1554        timeout = USB_TIMEOUT_MS(pipe);
1555
1556        /* wait for it to complete */
1557        for (;;) {
1558                /* check whether the controller is done */
1559                stat = hc_interrupt(ohci);
1560                if (stat < 0) {
1561                        stat = USB_ST_CRC_ERR;
1562                        break;
1563                }
1564
1565                /* NOTE: since we are not interrupt driven in U-Boot and always
1566                 * handle only one URB at a time, we cannot assume the
1567                 * transaction finished on the first successful return from
1568                 * hc_interrupt().. unless the flag for current URB is set,
1569                 * meaning that all TD's to/from device got actually
1570                 * transferred and processed. If the current URB is not
1571                 * finished we need to re-iterate this loop so as
1572                 * hc_interrupt() gets called again as there needs to be some
1573                 * more TD's to process still */
1574                if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1575                        /* 0xff is returned for an SF-interrupt */
1576                        break;
1577                }
1578
1579                if (--timeout) {
1580                        mdelay(1);
1581                        if (!urb->finished)
1582                                dbg("*");
1583
1584                } else {
1585                        if (!usb_pipeint(pipe))
1586                                err("CTL:TIMEOUT ");
1587                        dbg("submit_common_msg: TO status %x\n", stat);
1588                        urb->finished = 1;
1589                        stat = USB_ST_CRC_ERR;
1590                        break;
1591                }
1592        }
1593
1594        dev->status = stat;
1595        dev->act_len = urb->actual_length;
1596
1597        if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1598                invalidate_dcache_buffer(buffer, dev->act_len);
1599
1600#ifdef DEBUG
1601        pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1602                  setup, "RET(ctlr)", usb_pipein(pipe));
1603#else
1604        ohci_mdelay(1);
1605#endif
1606        urb_free_priv(urb);
1607        return 0;
1608}
1609
1610#define MAX_INT_QUEUESIZE 8
1611
1612struct int_queue {
1613        int queuesize;
1614        int curr_urb;
1615        urb_priv_t *urb[MAX_INT_QUEUESIZE];
1616};
1617
1618static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1619                struct usb_device *udev, unsigned long pipe, int queuesize,
1620                int elementsize, void *buffer, int interval)
1621{
1622        struct int_queue *queue;
1623        ohci_dev_t *ohci_dev;
1624        int i;
1625
1626        if (queuesize > MAX_INT_QUEUESIZE)
1627                return NULL;
1628
1629        ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1630        if (!ohci_dev)
1631                return NULL;
1632
1633        queue = malloc(sizeof(*queue));
1634        if (!queue) {
1635                printf("ohci: Error out of memory allocating int queue\n");
1636                return NULL;
1637        }
1638
1639        for (i = 0; i < queuesize; i++) {
1640                queue->urb[i] = ohci_alloc_urb(udev, pipe,
1641                                               buffer + i * elementsize,
1642                                               elementsize, interval);
1643                if (!queue->urb[i])
1644                        break;
1645
1646                if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1647                        printf("ohci: Error submitting int queue job\n");
1648                        urb_free_priv(queue->urb[i]);
1649                        break;
1650                }
1651        }
1652        if (i == 0) {
1653                /* We did not succeed in submitting even 1 urb */
1654                free(queue);
1655                return NULL;
1656        }
1657
1658        queue->queuesize = i;
1659        queue->curr_urb = 0;
1660
1661        return queue;
1662}
1663
1664static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1665                                  struct int_queue *queue)
1666{
1667        if (queue->curr_urb == queue->queuesize)
1668                return NULL; /* Queue depleted */
1669
1670        if (hc_interrupt(ohci) < 0)
1671                return NULL;
1672
1673        if (queue->urb[queue->curr_urb]->finished) {
1674                void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1675                queue->curr_urb++;
1676                return ret;
1677        }
1678
1679        return NULL;
1680}
1681
1682static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1683                                   struct int_queue *queue)
1684{
1685        int i;
1686
1687        for (i = 0; i < queue->queuesize; i++)
1688                urb_free_priv(queue->urb[i]);
1689
1690        free(queue);
1691
1692        return 0;
1693}
1694
1695#ifndef CONFIG_DM_USB
1696/* submit routines called from usb.c */
1697int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1698                int transfer_len)
1699{
1700        info("submit_bulk_msg");
1701        return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1702                                 NULL, 0);
1703}
1704
1705int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1706                int transfer_len, int interval)
1707{
1708        info("submit_int_msg");
1709        return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1710                        interval);
1711}
1712
1713struct int_queue *create_int_queue(struct usb_device *dev,
1714                unsigned long pipe, int queuesize, int elementsize,
1715                void *buffer, int interval)
1716{
1717        return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1718                                      elementsize, buffer, interval);
1719}
1720
1721void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1722{
1723        return _ohci_poll_int_queue(&gohci, dev, queue);
1724}
1725
1726int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1727{
1728        return _ohci_destroy_int_queue(&gohci, dev, queue);
1729}
1730#endif
1731
1732static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1733        unsigned long pipe, void *buffer, int transfer_len,
1734        struct devrequest *setup)
1735{
1736        int maxsize = usb_maxpacket(dev, pipe);
1737
1738        info("submit_control_msg");
1739#ifdef DEBUG
1740        pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1741                  setup, "SUB", usb_pipein(pipe));
1742#else
1743        ohci_mdelay(1);
1744#endif
1745        if (!maxsize) {
1746                err("submit_control_message: pipesize for pipe %lx is zero",
1747                        pipe);
1748                return -1;
1749        }
1750        if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1751                ohci->rh.dev = dev;
1752                /* root hub - redirect */
1753                return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1754                                          transfer_len, setup);
1755        }
1756
1757        return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1758                                 setup, 0);
1759}
1760
1761/*-------------------------------------------------------------------------*
1762 * HC functions
1763 *-------------------------------------------------------------------------*/
1764
1765/* reset the HC and BUS */
1766
1767static int hc_reset(ohci_t *ohci)
1768{
1769#ifdef CONFIG_PCI_EHCI_DEVNO
1770        pci_dev_t pdev;
1771#endif
1772        int timeout = 30;
1773        int smm_timeout = 50; /* 0,5 sec */
1774
1775        dbg("%s\n", __FUNCTION__);
1776
1777#ifdef CONFIG_PCI_EHCI_DEVNO
1778        /*
1779         *  Some multi-function controllers (e.g. ISP1562) allow root hub
1780         * resetting via EHCI registers only.
1781         */
1782        pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1783        if (pdev != -1) {
1784                u32 base;
1785                int timeout = 1000;
1786
1787                pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1788                base += EHCI_USBCMD_OFF;
1789                ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1790
1791                while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1792                        if (timeout-- <= 0) {
1793                                printf("USB RootHub reset timed out!");
1794                                break;
1795                        }
1796                        udelay(1);
1797                }
1798        } else
1799                printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1800#endif
1801        if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1802                /* SMM owns the HC, request ownership */
1803                ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1804                info("USB HC TakeOver from SMM");
1805                while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1806                        mdelay(10);
1807                        if (--smm_timeout == 0) {
1808                                err("USB HC TakeOver failed!");
1809                                return -1;
1810                        }
1811                }
1812        }
1813
1814        /* Disable HC interrupts */
1815        ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1816
1817        dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1818                ohci->slot_name,
1819                ohci_readl(&ohci->regs->control));
1820
1821        /* Reset USB (needed by some controllers) */
1822        ohci->hc_control = 0;
1823        ohci_writel(ohci->hc_control, &ohci->regs->control);
1824
1825        /* HC Reset requires max 10 us delay */
1826        ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1827        while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1828                if (--timeout == 0) {
1829                        err("USB HC reset timed out!");
1830                        return -1;
1831                }
1832                udelay(1);
1833        }
1834        return 0;
1835}
1836
1837/*-------------------------------------------------------------------------*/
1838
1839/* Start an OHCI controller, set the BUS operational
1840 * enable interrupts
1841 * connect the virtual root hub */
1842
1843static int hc_start(ohci_t *ohci)
1844{
1845        __u32 mask;
1846        unsigned int fminterval;
1847        int i;
1848
1849        ohci->disabled = 1;
1850        for (i = 0; i < NUM_INT_DEVS; i++)
1851                ohci->int_dev[i].devnum = -1;
1852
1853        /* Tell the controller where the control and bulk lists are
1854         * The lists are empty now. */
1855
1856        ohci_writel(0, &ohci->regs->ed_controlhead);
1857        ohci_writel(0, &ohci->regs->ed_bulkhead);
1858
1859        ohci_writel((uintptr_t)ohci->hcca,
1860                    &ohci->regs->hcca); /* reset clears this */
1861
1862        fminterval = 0x2edf;
1863        ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1864        fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1865        ohci_writel(fminterval, &ohci->regs->fminterval);
1866        ohci_writel(0x628, &ohci->regs->lsthresh);
1867
1868        /* start controller operations */
1869        ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1870        ohci->disabled = 0;
1871        ohci_writel(ohci->hc_control, &ohci->regs->control);
1872
1873        /* disable all interrupts */
1874        mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1875                        OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1876                        OHCI_INTR_OC | OHCI_INTR_MIE);
1877        ohci_writel(mask, &ohci->regs->intrdisable);
1878        /* clear all interrupts */
1879        mask &= ~OHCI_INTR_MIE;
1880        ohci_writel(mask, &ohci->regs->intrstatus);
1881        /* Choose the interrupts we care about now  - but w/o MIE */
1882        mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1883        ohci_writel(mask, &ohci->regs->intrenable);
1884
1885#ifdef  OHCI_USE_NPS
1886        /* required for AMD-756 and some Mac platforms */
1887        ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1888                &ohci->regs->roothub.a);
1889        ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1890#endif  /* OHCI_USE_NPS */
1891
1892        /* connect the virtual root hub */
1893        ohci->rh.devnum = 0;
1894
1895        return 0;
1896}
1897
1898/*-------------------------------------------------------------------------*/
1899
1900/* an interrupt happens */
1901
1902static int hc_interrupt(ohci_t *ohci)
1903{
1904        struct ohci_regs *regs = ohci->regs;
1905        int ints;
1906        int stat = -1;
1907
1908        invalidate_dcache_hcca(ohci->hcca);
1909
1910        if ((ohci->hcca->done_head != 0) &&
1911                                !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1912                ints =  OHCI_INTR_WDH;
1913        } else {
1914                ints = ohci_readl(&regs->intrstatus);
1915                if (ints == ~(u32)0) {
1916                        ohci->disabled++;
1917                        err("%s device removed!", ohci->slot_name);
1918                        return -1;
1919                } else {
1920                        ints &= ohci_readl(&regs->intrenable);
1921                        if (ints == 0) {
1922                                dbg("hc_interrupt: returning..\n");
1923                                return 0xff;
1924                        }
1925                }
1926        }
1927
1928        /* dbg("Interrupt: %x frame: %x", ints,
1929                                        le16_to_cpu(ohci->hcca->frame_no)); */
1930
1931        if (ints & OHCI_INTR_RHSC)
1932                stat = 0xff;
1933
1934        if (ints & OHCI_INTR_UE) {
1935                ohci->disabled++;
1936                err("OHCI Unrecoverable Error, controller usb-%s disabled",
1937                        ohci->slot_name);
1938                /* e.g. due to PCI Master/Target Abort */
1939
1940#ifdef  DEBUG
1941                ohci_dump(ohci, 1);
1942#else
1943                ohci_mdelay(1);
1944#endif
1945                /* FIXME: be optimistic, hope that bug won't repeat often. */
1946                /* Make some non-interrupt context restart the controller. */
1947                /* Count and limit the retries though; either hardware or */
1948                /* software errors can go forever... */
1949                hc_reset(ohci);
1950                return -1;
1951        }
1952
1953        if (ints & OHCI_INTR_WDH) {
1954                ohci_mdelay(1);
1955                ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1956                (void)ohci_readl(&regs->intrdisable); /* flush */
1957                stat = dl_done_list(ohci);
1958                ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1959                (void)ohci_readl(&regs->intrdisable); /* flush */
1960        }
1961
1962        if (ints & OHCI_INTR_SO) {
1963                dbg("USB Schedule overrun\n");
1964                ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1965                stat = -1;
1966        }
1967
1968        /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1969        if (ints & OHCI_INTR_SF) {
1970                unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1971                mdelay(1);
1972                ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1973                if (ohci->ed_rm_list[frame] != NULL)
1974                        ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1975                stat = 0xff;
1976        }
1977
1978        ohci_writel(ints, &regs->intrstatus);
1979        return stat;
1980}
1981
1982/*-------------------------------------------------------------------------*/
1983
1984#ifndef CONFIG_DM_USB
1985
1986/*-------------------------------------------------------------------------*/
1987
1988/* De-allocate all resources.. */
1989
1990static void hc_release_ohci(ohci_t *ohci)
1991{
1992        dbg("USB HC release ohci usb-%s", ohci->slot_name);
1993
1994        if (!ohci->disabled)
1995                hc_reset(ohci);
1996}
1997
1998/*-------------------------------------------------------------------------*/
1999
2000/*
2001 * low level initalisation routine, called from usb.c
2002 */
2003static char ohci_inited = 0;
2004
2005int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
2006{
2007#ifdef CONFIG_PCI_OHCI
2008        pci_dev_t pdev;
2009#endif
2010
2011#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2012        /* cpu dependant init */
2013        if (usb_cpu_init())
2014                return -1;
2015#endif
2016
2017#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2018        /*  board dependant init */
2019        if (board_usb_init(index, USB_INIT_HOST))
2020                return -1;
2021#endif
2022        memset(&gohci, 0, sizeof(ohci_t));
2023
2024        /* align the storage */
2025        if ((__u32)&ghcca[0] & 0xff) {
2026                err("HCCA not aligned!!");
2027                return -1;
2028        }
2029        gohci.hcca = &ghcca[0];
2030        info("aligned ghcca %p", gohci.hcca);
2031        memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
2032
2033        gohci.disabled = 1;
2034        gohci.sleeping = 0;
2035        gohci.irq = -1;
2036#ifdef CONFIG_PCI_OHCI
2037        pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
2038
2039        if (pdev != -1) {
2040                u16 vid, did;
2041                u32 base;
2042                pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
2043                pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
2044                printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
2045                                vid, did, (pdev >> 16) & 0xff,
2046                                (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
2047                pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
2048                printf("OHCI regs address 0x%08x\n", base);
2049                gohci.regs = (struct ohci_regs *)base;
2050        } else
2051                return -1;
2052#else
2053        gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
2054#endif
2055
2056        gohci.flags = 0;
2057        gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2058
2059        if (hc_reset (&gohci) < 0) {
2060                hc_release_ohci (&gohci);
2061                err ("can't reset usb-%s", gohci.slot_name);
2062#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2063                /* board dependant cleanup */
2064                board_usb_cleanup(index, USB_INIT_HOST);
2065#endif
2066
2067#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2068                /* cpu dependant cleanup */
2069                usb_cpu_init_fail();
2070#endif
2071                return -1;
2072        }
2073
2074        if (hc_start(&gohci) < 0) {
2075                err("can't start usb-%s", gohci.slot_name);
2076                hc_release_ohci(&gohci);
2077                /* Initialization failed */
2078#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2079                /* board dependant cleanup */
2080                usb_board_stop();
2081#endif
2082
2083#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2084                /* cpu dependant cleanup */
2085                usb_cpu_stop();
2086#endif
2087                return -1;
2088        }
2089
2090#ifdef  DEBUG
2091        ohci_dump(&gohci, 1);
2092#else
2093        ohci_mdelay(1);
2094#endif
2095        ohci_inited = 1;
2096        return 0;
2097}
2098
2099int usb_lowlevel_stop(int index)
2100{
2101        /* this gets called really early - before the controller has */
2102        /* even been initialized! */
2103        if (!ohci_inited)
2104                return 0;
2105        /* TODO release any interrupts, etc. */
2106        /* call hc_release_ohci() here ? */
2107        hc_reset(&gohci);
2108
2109#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2110        /* board dependant cleanup */
2111        if (usb_board_stop())
2112                return -1;
2113#endif
2114
2115#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2116        /* cpu dependant cleanup */
2117        if (usb_cpu_stop())
2118                return -1;
2119#endif
2120        /* This driver is no longer initialised. It needs a new low-level
2121         * init (board/cpu) before it can be used again. */
2122        ohci_inited = 0;
2123        return 0;
2124}
2125
2126int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2127        void *buffer, int transfer_len, struct devrequest *setup)
2128{
2129        return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2130                                        transfer_len, setup);
2131}
2132#endif
2133
2134#ifdef CONFIG_DM_USB
2135static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2136                                   unsigned long pipe, void *buffer, int length,
2137                                   struct devrequest *setup)
2138{
2139        ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2140
2141        return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2142                                        length, setup);
2143}
2144
2145static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2146                                unsigned long pipe, void *buffer, int length)
2147{
2148        ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2149
2150        return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2151}
2152
2153static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2154                               unsigned long pipe, void *buffer, int length,
2155                               int interval)
2156{
2157        ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2158
2159        return submit_common_msg(ohci, udev, pipe, buffer, length,
2160                                 NULL, interval);
2161}
2162
2163static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2164                struct usb_device *udev, unsigned long pipe, int queuesize,
2165                int elementsize, void *buffer, int interval)
2166{
2167        ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2168
2169        return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2170                                      buffer, interval);
2171}
2172
2173static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2174                                 struct int_queue *queue)
2175{
2176        ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2177
2178        return _ohci_poll_int_queue(ohci, udev, queue);
2179}
2180
2181static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2182                                  struct int_queue *queue)
2183{
2184        ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2185
2186        return _ohci_destroy_int_queue(ohci, udev, queue);
2187}
2188
2189int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2190{
2191        struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2192        ohci_t *ohci = dev_get_priv(dev);
2193        u32 reg;
2194
2195        priv->desc_before_addr = true;
2196
2197        ohci->regs = regs;
2198        ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2199        if (!ohci->hcca)
2200                return -ENOMEM;
2201        memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2202        flush_dcache_hcca(ohci->hcca);
2203
2204        if (hc_reset(ohci) < 0)
2205                return -EIO;
2206
2207        if (hc_start(ohci) < 0)
2208                return -EIO;
2209
2210        reg = ohci_readl(&regs->revision);
2211        printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2212
2213        return 0;
2214}
2215
2216int ohci_deregister(struct udevice *dev)
2217{
2218        ohci_t *ohci = dev_get_priv(dev);
2219
2220        if (hc_reset(ohci) < 0)
2221                return -EIO;
2222
2223        free(ohci->hcca);
2224
2225        return 0;
2226}
2227
2228struct dm_usb_ops ohci_usb_ops = {
2229        .control = ohci_submit_control_msg,
2230        .bulk = ohci_submit_bulk_msg,
2231        .interrupt = ohci_submit_int_msg,
2232        .create_int_queue = ohci_create_int_queue,
2233        .poll_int_queue = ohci_poll_int_queue,
2234        .destroy_int_queue = ohci_destroy_int_queue,
2235};
2236
2237#endif
2238