LXR uboot/include/dm/platform_data/serial

   1/*
   2 * Copyright (c) 2014  Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   3 * Copyright (c) 2014  Renesas Electronics Corporation
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#ifndef __serial_sh_h
   9#define __serial_sh_h
  10
  11enum sh_clk_mode {
  12        INT_CLK,
  13        EXT_CLK,
  14};
  15
  16enum sh_serial_type {
  17        PORT_SCI,
  18        PORT_SCIF,
  19        PORT_SCIFA,
  20        PORT_SCIFB,
  21};
  22
  23/*
  24 * Information about SCIF port
  25 *
  26 * @base:       Register base address
  27 * @clk:        Input clock rate, used for calculating the baud rate divisor
  28 * @clk_mode:   Clock mode, set internal (INT) or external (EXT)
  29 * @type:       Type of SCIF
  30 */
  31struct sh_serial_platdata {
  32        unsigned long base;
  33        unsigned int clk;
  34        enum sh_clk_mode clk_mode;
  35        enum sh_serial_type type;
  36};
  37#endif /* __serial_sh_h */
  38