LXR uboot/post/lib_powerpc/cpu.c

   1/*
   2 * (C) Copyright 2002
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <common.h>
   9
  10/*
  11 * CPU test
  12 *
  13 * This test checks the arithmetic logic unit (ALU) of CPU.
  14 * It tests independently various groups of instructions using
  15 * run-time modification of the code to reduce the memory footprint.
  16 * For more details refer to post/cpu/ *.c files.
  17 */
  18
  19#include <watchdog.h>
  20#include <post.h>
  21#include <asm/mmu.h>
  22
  23#if CONFIG_POST & CONFIG_SYS_POST_CPU
  24
  25extern int cpu_post_test_cmp (void);
  26extern int cpu_post_test_cmpi (void);
  27extern int cpu_post_test_two (void);
  28extern int cpu_post_test_twox (void);
  29extern int cpu_post_test_three (void);
  30extern int cpu_post_test_threex (void);
  31extern int cpu_post_test_threei (void);
  32extern int cpu_post_test_andi (void);
  33extern int cpu_post_test_srawi (void);
  34extern int cpu_post_test_rlwnm (void);
  35extern int cpu_post_test_rlwinm (void);
  36extern int cpu_post_test_rlwimi (void);
  37extern int cpu_post_test_store (void);
  38extern int cpu_post_test_load (void);
  39extern int cpu_post_test_cr (void);
  40extern int cpu_post_test_b (void);
  41extern int cpu_post_test_multi (void);
  42extern int cpu_post_test_string (void);
  43extern int cpu_post_test_complex (void);
  44
  45DECLARE_GLOBAL_DATA_PTR;
  46
  47ulong cpu_post_makecr (long v)
  48{
  49        ulong cr = 0;
  50
  51        if (v < 0)
  52                cr |= 0x80000000;
  53        if (v > 0)
  54                cr |= 0x40000000;
  55        if (v == 0)
  56                cr |= 0x20000000;
  57
  58        return cr;
  59}
  60
  61int cpu_post_test (int flags)
  62{
  63        int ic = icache_status ();
  64        int ret = 0;
  65
  66        WATCHDOG_RESET();
  67        if (ic)
  68                icache_disable ();
  69
  70        if (ret == 0)
  71                ret = cpu_post_test_cmp ();
  72        if (ret == 0)
  73                ret = cpu_post_test_cmpi ();
  74        if (ret == 0)
  75                ret = cpu_post_test_two ();
  76        if (ret == 0)
  77                ret = cpu_post_test_twox ();
  78        WATCHDOG_RESET();
  79        if (ret == 0)
  80                ret = cpu_post_test_three ();
  81        if (ret == 0)
  82                ret = cpu_post_test_threex ();
  83        if (ret == 0)
  84                ret = cpu_post_test_threei ();
  85        if (ret == 0)
  86                ret = cpu_post_test_andi ();
  87        WATCHDOG_RESET();
  88        if (ret == 0)
  89                ret = cpu_post_test_srawi ();
  90        if (ret == 0)
  91                ret = cpu_post_test_rlwnm ();
  92        if (ret == 0)
  93                ret = cpu_post_test_rlwinm ();
  94        if (ret == 0)
  95                ret = cpu_post_test_rlwimi ();
  96        WATCHDOG_RESET();
  97        if (ret == 0)
  98                ret = cpu_post_test_store ();
  99        if (ret == 0)
 100                ret = cpu_post_test_load ();
 101        if (ret == 0)
 102                ret = cpu_post_test_cr ();
 103        if (ret == 0)
 104                ret = cpu_post_test_b ();
 105        WATCHDOG_RESET();
 106        if (ret == 0)
 107                ret = cpu_post_test_multi ();
 108        WATCHDOG_RESET();
 109        if (ret == 0)
 110                ret = cpu_post_test_string ();
 111        if (ret == 0)
 112                ret = cpu_post_test_complex ();
 113        WATCHDOG_RESET();
 114
 115        if (ic)
 116                icache_enable ();
 117
 118        WATCHDOG_RESET();
 119
 120        return ret;
 121}
 122
 123#endif /* CONFIG_POST & CONFIG_SYS_POST_CPU */
 124