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12#include <common.h>
13#include <config.h>
14#include <fdtdec.h>
15#include <asm/processor.h>
16#include <asm/microblaze_intc.h>
17#include <asm/asm.h>
18#include <asm/gpio.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22#ifdef CONFIG_XILINX_GPIO
23static int reset_pin = -1;
24#endif
25
26ulong ram_base;
27
28int dram_init_banksize(void)
29{
30 gd->bd->bi_dram[0].start = ram_base;
31 gd->bd->bi_dram[0].size = get_effective_memsize();
32
33 return 0;
34}
35
36int dram_init(void)
37{
38 int node;
39 fdt_addr_t addr;
40 fdt_size_t size;
41 const void *blob = gd->fdt_blob;
42
43 node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
44 "memory", 7);
45 if (node == -FDT_ERR_NOTFOUND) {
46 debug("DRAM: Can't get memory node\n");
47 return 1;
48 }
49 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
50 if (addr == FDT_ADDR_T_NONE || size == 0) {
51 debug("DRAM: Can't get base address or size\n");
52 return 1;
53 }
54 ram_base = addr;
55
56 gd->ram_top = addr;
57 gd->ram_size = size;
58
59 return 0;
60};
61
62int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
63{
64#ifndef CONFIG_SPL_BUILD
65#ifdef CONFIG_XILINX_GPIO
66 if (reset_pin != -1)
67 gpio_direction_output(reset_pin, 1);
68#endif
69
70#ifdef CONFIG_XILINX_TB_WATCHDOG
71 hw_watchdog_disable();
72#endif
73#endif
74 puts ("Reseting board\n");
75 __asm__ __volatile__ (" mts rmsr, r0;" \
76 "bra r0");
77
78 return 0;
79}
80
81static int gpio_init(void)
82{
83#ifdef CONFIG_XILINX_GPIO
84 reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
85 if (reset_pin != -1)
86 gpio_request(reset_pin, "reset_pin");
87#endif
88 return 0;
89}
90
91int board_late_init(void)
92{
93 gpio_init();
94
95 return 0;
96}
97