uboot/drivers/net/fsl-mc/dpio/qbman_portal.h
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   1/*
   2 * Copyright (C) 2014 Freescale Semiconductor
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#include "qbman_private.h"
   8#include <fsl-mc/fsl_qbman_portal.h>
   9#include <fsl-mc/fsl_dpaa_fd.h>
  10
  11/* All QBMan command and result structures use this "valid bit" encoding */
  12#define QB_VALID_BIT ((uint32_t)0x80)
  13
  14/* Management command result codes */
  15#define QBMAN_MC_RSLT_OK      0xf0
  16
  17#define QBMAN_VER_4_0_DQRR_SIZE 4
  18#define QBMAN_VER_4_1_DQRR_SIZE 8
  19
  20
  21/* --------------------- */
  22/* portal data structure */
  23/* --------------------- */
  24
  25struct qbman_swp {
  26        const struct qbman_swp_desc *desc;
  27        /* The qbman_sys (ie. arch/OS-specific) support code can put anything it
  28         * needs in here. */
  29        struct qbman_swp_sys sys;
  30        /* Management commands */
  31        struct {
  32#ifdef QBMAN_CHECKING
  33                enum swp_mc_check {
  34                        swp_mc_can_start, /* call __qbman_swp_mc_start() */
  35                        swp_mc_can_submit, /* call __qbman_swp_mc_submit() */
  36                        swp_mc_can_poll, /* call __qbman_swp_mc_result() */
  37                } check;
  38#endif
  39                uint32_t valid_bit; /* 0x00 or 0x80 */
  40        } mc;
  41        /* Push dequeues */
  42        uint32_t sdq;
  43        /* Volatile dequeues */
  44        struct {
  45                /* VDQCR supports a "1 deep pipeline", meaning that if you know
  46                 * the last-submitted command is already executing in the
  47                 * hardware (as evidenced by at least 1 valid dequeue result),
  48                 * you can write another dequeue command to the register, the
  49                 * hardware will start executing it as soon as the
  50                 * already-executing command terminates. (This minimises latency
  51                 * and stalls.) With that in mind, this "busy" variable refers
  52                 * to whether or not a command can be submitted, not whether or
  53                 * not a previously-submitted command is still executing. In
  54                 * other words, once proof is seen that the previously-submitted
  55                 * command is executing, "vdq" is no longer "busy".
  56                 */
  57                atomic_t busy;
  58                uint32_t valid_bit; /* 0x00 or 0x80 */
  59                /* We need to determine when vdq is no longer busy. This depends
  60                 * on whether the "busy" (last-submitted) dequeue command is
  61                 * targeting DQRR or main-memory, and detected is based on the
  62                 * presence of the dequeue command's "token" showing up in
  63                 * dequeue entries in DQRR or main-memory (respectively). Debug
  64                 * builds will, when submitting vdq commands, verify that the
  65                 * dequeue result location is not already equal to the command's
  66                 * token value. */
  67                struct ldpaa_dq *storage; /* NULL if DQRR */
  68                uint32_t token;
  69        } vdq;
  70        /* DQRR */
  71        struct {
  72                uint32_t next_idx;
  73                uint32_t valid_bit;
  74                uint8_t dqrr_size;
  75        } dqrr;
  76};
  77
  78/* -------------------------- */
  79/* portal management commands */
  80/* -------------------------- */
  81
  82/* Different management commands all use this common base layer of code to issue
  83 * commands and poll for results. The first function returns a pointer to where
  84 * the caller should fill in their MC command (though they should ignore the
  85 * verb byte), the second function commits merges in the caller-supplied command
  86 * verb (which should not include the valid-bit) and submits the command to
  87 * hardware, and the third function checks for a completed response (returns
  88 * non-NULL if only if the response is complete). */
  89void *qbman_swp_mc_start(struct qbman_swp *p);
  90void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);
  91void *qbman_swp_mc_result(struct qbman_swp *p);
  92
  93/* Wraps up submit + poll-for-result */
  94static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
  95                                          uint32_t cmd_verb)
  96{
  97        int loopvar;
  98
  99        qbman_swp_mc_submit(swp, cmd, cmd_verb);
 100        DBG_POLL_START(loopvar);
 101        do {
 102                DBG_POLL_CHECK(loopvar);
 103                cmd = qbman_swp_mc_result(swp);
 104        } while (!cmd);
 105        return cmd;
 106}
 107
 108/* ------------ */
 109/* qb_attr_code */
 110/* ------------ */
 111
 112/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
 113 * is either serving as a configuration command or a query result. The
 114 * representation is inherently little-endian, as the indexing of the words is
 115 * itself little-endian in nature and layerscape is little endian for anything
 116 * that crosses a word boundary too (64-bit fields are the obvious examples).
 117 */
 118struct qb_attr_code {
 119        unsigned int word; /* which uint32_t[] array member encodes the field */
 120        unsigned int lsoffset; /* encoding offset from ls-bit */
 121        unsigned int width; /* encoding width. (bool must be 1.) */
 122};
 123
 124/* Macros to define codes */
 125#define QB_CODE(a, b, c) { a, b, c}
 126
 127/* decode a field from a cacheline */
 128static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
 129                                      const uint32_t *cacheline)
 130{
 131        return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
 132}
 133
 134
 135/* encode a field to a cacheline */
 136static inline void qb_attr_code_encode(const struct qb_attr_code *code,
 137                                       uint32_t *cacheline, uint32_t val)
 138{
 139        cacheline[code->word] =
 140                r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
 141                | e32_uint32_t(code->lsoffset, code->width, val);
 142}
 143
 144static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
 145                                       uint64_t *cacheline, uint64_t val)
 146{
 147        cacheline[code->word / 2] = val;
 148}
 149
 150/* ---------------------- */
 151/* Descriptors/cachelines */
 152/* ---------------------- */
 153
 154/* To avoid needless dynamic allocation, the driver API often gives the caller
 155 * a "descriptor" type that the caller can instantiate however they like.
 156 * Ultimately though, it is just a cacheline of binary storage (or something
 157 * smaller when it is known that the descriptor doesn't need all 64 bytes) for
 158 * holding pre-formatted pieces of hardware commands. The performance-critical
 159 * code can then copy these descriptors directly into hardware command
 160 * registers more efficiently than trying to construct/format commands
 161 * on-the-fly. The API user sees the descriptor as an array of 32-bit words in
 162 * order for the compiler to know its size, but the internal details are not
 163 * exposed. The following macro is used within the driver for converting *any*
 164 * descriptor pointer to a usable array pointer. The use of a macro (instead of
 165 * an inline) is necessary to work with different descriptor types and to work
 166 * correctly with const and non-const inputs (and similarly-qualified outputs).
 167 */
 168#define qb_cl(d) (&(d)->dont_manipulate_directly[0])
 169
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