1/* 2 * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#ifndef _CONFIG_AXS10X_H_ 8#define _CONFIG_AXS10X_H_ 9 10#include <linux/sizes.h> 11/* 12 * CPU configuration 13 */ 14#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000 15#define ARC_APB_PERIPHERAL_BASE 0xF0000000 16#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000) 17#define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000) 18 19/* 20 * Memory configuration 21 */ 22#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 23 24#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 25#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 26#define CONFIG_SYS_SDRAM_SIZE SZ_512M 27 28#define CONFIG_SYS_INIT_SP_ADDR \ 29 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) 30 31#define CONFIG_SYS_MALLOC_LEN SZ_2M 32#define CONFIG_SYS_BOOTM_LEN SZ_32M 33#define CONFIG_SYS_LOAD_ADDR 0x82000000 34 35/* 36 * This board might be of different versions so handle it 37 */ 38#define CONFIG_BOARD_TYPES 39 40/* 41 * NAND Flash configuration 42 */ 43#define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000) 44#define CONFIG_SYS_MAX_NAND_DEVICE 1 45 46/* 47 * UART configuration 48 */ 49#define CONFIG_DW_SERIAL 50#define CONFIG_SYS_NS16550_SERIAL 51#define CONFIG_SYS_NS16550_CLK 33333333 52#define CONFIG_SYS_NS16550_MEM32 53 54/* 55 * Ethernet PHY configuration 56 */ 57#define CONFIG_MII 58 59/* 60 * USB 1.1 configuration 61 */ 62#define CONFIG_USB_OHCI_NEW 63#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 64 65#define CONFIG_AUTO_COMPLETE 66#define CONFIG_CMDLINE_EDITING 67 68/* 69 * Environment settings 70 */ 71#define CONFIG_ENV_SIZE SZ_16K 72 73/* 74 * Environment configuration 75 */ 76#define CONFIG_BOOTFILE "uImage" 77#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR 78 79/* 80 * Console configuration 81 */ 82#define CONFIG_SYS_LONGHELP 83 84/* 85 * Misc utility configuration 86 */ 87#define CONFIG_BOUNCE_BUFFER 88 89#endif /* _CONFIG_AXS10X_H_ */ 90