1/* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * Aneesh V <aneesh@ti.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8#ifndef _PL310_H_ 9#define _PL310_H_ 10 11#include <linux/types.h> 12 13/* Register bit fields */ 14#define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16) 15#define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) 16#define L2X0_STNDBY_MODE_EN (1 << 0) 17#define L2X0_CTRL_EN 1 18 19#define L310_SHARED_ATT_OVERRIDE_ENABLE (1 << 22) 20#define L310_AUX_CTRL_DATA_PREFETCH_MASK (1 << 28) 21#define L310_AUX_CTRL_INST_PREFETCH_MASK (1 << 29) 22 23struct pl310_regs { 24 u32 pl310_cache_id; 25 u32 pl310_cache_type; 26 u32 pad1[62]; 27 u32 pl310_ctrl; 28 u32 pl310_aux_ctrl; 29 u32 pl310_tag_latency_ctrl; 30 u32 pl310_data_latency_ctrl; 31 u32 pad2[60]; 32 u32 pl310_event_cnt_ctrl; 33 u32 pl310_event_cnt1_cfg; 34 u32 pl310_event_cnt0_cfg; 35 u32 pl310_event_cnt1_val; 36 u32 pl310_event_cnt0_val; 37 u32 pl310_intr_mask; 38 u32 pl310_masked_intr_stat; 39 u32 pl310_raw_intr_stat; 40 u32 pl310_intr_clear; 41 u32 pad3[323]; 42 u32 pl310_cache_sync; 43 u32 pad4[15]; 44 u32 pl310_inv_line_pa; 45 u32 pad5[2]; 46 u32 pl310_inv_way; 47 u32 pad6[12]; 48 u32 pl310_clean_line_pa; 49 u32 pad7[1]; 50 u32 pl310_clean_line_idx; 51 u32 pl310_clean_way; 52 u32 pad8[12]; 53 u32 pl310_clean_inv_line_pa; 54 u32 pad9[1]; 55 u32 pl310_clean_inv_line_idx; 56 u32 pl310_clean_inv_way; 57 u32 pad10[64]; 58 u32 pl310_lockdown_dbase; 59 u32 pl310_lockdown_ibase; 60 u32 pad11[190]; 61 u32 pl310_addr_filter_start; 62 u32 pl310_addr_filter_end; 63 u32 pad12[190]; 64 u32 pl310_test_operation; 65 u32 pad13[3]; 66 u32 pl310_line_data; 67 u32 pad14[7]; 68 u32 pl310_line_tag; 69 u32 pad15[3]; 70 u32 pl310_debug_ctrl; 71 u32 pad16[7]; 72 u32 pl310_prefetch_ctrl; 73 u32 pad17[7]; 74 u32 pl310_power_ctrl; 75}; 76 77void pl310_inval_all(void); 78void pl310_clean_inval_all(void); 79void pl310_inval_range(u32 start, u32 end); 80void pl310_clean_inval_range(u32 start, u32 end); 81 82#endif 83