LXR uboot/board/freescale/t4rdb/cpld.c

   1/**
   2 * Copyright 2014 Freescale Semiconductor
   3 *
   4 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
   5 *
   6 * SPDX-License-Identifier:     GPL-2.0+
   7 *
   8 * This file provides support for the board-specific CPLD used on some Freescale
   9 * reference boards.
  10 *
  11 * The following macros need to be defined:
  12 *
  13 * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the
  14 * CPLD register map
  15 *
  16 */
  17
  18#include <common.h>
  19#include <command.h>
  20#include <asm/io.h>
  21
  22#include "cpld.h"
  23
  24u8 cpld_read(unsigned int reg)
  25{
  26        void *p = (void *)CONFIG_SYS_CPLD_BASE;
  27
  28        return in_8(p + reg);
  29}
  30
  31void cpld_write(unsigned int reg, u8 value)
  32{
  33        void *p = (void *)CONFIG_SYS_CPLD_BASE;
  34
  35        out_8(p + reg, value);
  36}
  37
  38/**
  39 * Set the boot bank to the alternate bank
  40 */
  41void cpld_set_altbank(void)
  42{
  43        u8 val, curbank, altbank, override;
  44
  45        val = CPLD_READ(vbank);
  46        curbank = val & CPLD_BANK_SEL_MASK;
  47
  48        switch (curbank) {
  49        case CPLD_SELECT_BANK0:
  50        case CPLD_SELECT_BANK4:
  51                altbank = CPLD_SELECT_BANK4;
  52                CPLD_WRITE(vbank, altbank);
  53                override = CPLD_READ(software_on);
  54                CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN);
  55                CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET);
  56                break;
  57        default:
  58                printf("CPLD Altbank Fail: Invalid value!\n");
  59                return;
  60        }
  61}
  62
  63/**
  64 * Set the boot bank to the default bank
  65 */
  66void cpld_set_defbank(void)
  67{
  68        u8 val;
  69
  70        val = CPLD_DEFAULT_BANK;
  71
  72        CPLD_WRITE(global_reset, val);
  73}
  74
  75#ifdef DEBUG
  76static void cpld_dump_regs(void)
  77{
  78        printf("chip_id1        = 0x%02x\n", CPLD_READ(chip_id1));
  79        printf("chip_id2        = 0x%02x\n", CPLD_READ(chip_id2));
  80        printf("sw_maj_ver      = 0x%02x\n", CPLD_READ(sw_maj_ver));
  81        printf("sw_min_ver      = 0x%02x\n", CPLD_READ(sw_min_ver));
  82        printf("hw_ver          = 0x%02x\n", CPLD_READ(hw_ver));
  83        printf("software_on     = 0x%02x\n", CPLD_READ(software_on));
  84        printf("cfg_rcw_src     = 0x%02x\n", CPLD_READ(cfg_rcw_src));
  85        printf("res0            = 0x%02x\n", CPLD_READ(res0));
  86        printf("vbank           = 0x%02x\n", CPLD_READ(vbank));
  87        printf("sw1_sysclk      = 0x%02x\n", CPLD_READ(sw1_sysclk));
  88        printf("sw2_status      = 0x%02x\n", CPLD_READ(sw2_status));
  89        printf("sw3_status      = 0x%02x\n", CPLD_READ(sw3_status));
  90        printf("sw4_status      = 0x%02x\n", CPLD_READ(sw4_status));
  91        printf("sys_reset       = 0x%02x\n", CPLD_READ(sys_reset));
  92        printf("global_reset    = 0x%02x\n", CPLD_READ(global_reset));
  93        printf("res1            = 0x%02x\n", CPLD_READ(res1));
  94        putc('\n');
  95}
  96#endif
  97
  98#ifndef CONFIG_SPL_BUILD
  99int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 100{
 101        int rc = 0;
 102
 103        if (argc <= 1)
 104                return cmd_usage(cmdtp);
 105
 106        if (strcmp(argv[1], "reset") == 0) {
 107                if (strcmp(argv[2], "altbank") == 0)
 108                        cpld_set_altbank();
 109                else
 110                        cpld_set_defbank();
 111#ifdef DEBUG
 112        } else if (strcmp(argv[1], "dump") == 0) {
 113                cpld_dump_regs();
 114#endif
 115        } else
 116                rc = cmd_usage(cmdtp);
 117
 118        return rc;
 119}
 120
 121U_BOOT_CMD(
 122        cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
 123        "Reset the board or alternate bank",
 124        "reset - reset to default bank\n"
 125        "cpld reset altbank - reset to alternate bank\n"
 126#ifdef DEBUG
 127        "cpld dump - display the CPLD registers\n"
 128#endif
 129        );
 130#endif
 131