LXR uboot/board/highbank/highbank.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2010-2011 Calxeda, Inc.
   4 */
   5
   6#include <common.h>
   7#include <ahci.h>
   8#include <netdev.h>
   9#include <scsi.h>
  10
  11#include <linux/sizes.h>
  12#include <asm/io.h>
  13
  14#define HB_AHCI_BASE                    0xffe08000
  15
  16#define HB_SCU_A9_PWR_STATUS            0xfff10008
  17#define HB_SREG_A9_PWR_REQ              0xfff3cf00
  18#define HB_SREG_A9_BOOT_SRC_STAT        0xfff3cf04
  19#define HB_SREG_A9_PWRDOM_STAT          0xfff3cf20
  20#define HB_SREG_A15_PWR_CTRL            0xfff3c200
  21
  22#define HB_PWR_SUSPEND                  0
  23#define HB_PWR_SOFT_RESET               1
  24#define HB_PWR_HARD_RESET               2
  25#define HB_PWR_SHUTDOWN                 3
  26
  27#define PWRDOM_STAT_SATA                0x80000000
  28#define PWRDOM_STAT_PCI                 0x40000000
  29#define PWRDOM_STAT_EMMC                0x20000000
  30
  31#define HB_SCU_A9_PWR_NORMAL            0
  32#define HB_SCU_A9_PWR_DORMANT           2
  33#define HB_SCU_A9_PWR_OFF               3
  34
  35DECLARE_GLOBAL_DATA_PTR;
  36
  37void cphy_disable_overrides(void);
  38
  39/*
  40 * Miscellaneous platform dependent initialisations
  41 */
  42int board_init(void)
  43{
  44        icache_enable();
  45
  46        return 0;
  47}
  48
  49/* We know all the init functions have been run now */
  50int board_eth_init(bd_t *bis)
  51{
  52        int rc = 0;
  53
  54#ifdef CONFIG_CALXEDA_XGMAC
  55        rc += calxedaxgmac_initialize(0, 0xfff50000);
  56        rc += calxedaxgmac_initialize(1, 0xfff51000);
  57#endif
  58        return rc;
  59}
  60
  61#ifdef CONFIG_SCSI_AHCI_PLAT
  62void scsi_init(void)
  63{
  64        u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  65
  66        cphy_disable_overrides();
  67        if (reg & PWRDOM_STAT_SATA) {
  68                ahci_init((void __iomem *)HB_AHCI_BASE);
  69                scsi_scan(true);
  70        }
  71}
  72#endif
  73
  74#ifdef CONFIG_MISC_INIT_R
  75int misc_init_r(void)
  76{
  77        char envbuffer[16];
  78        u32 boot_choice;
  79
  80        boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
  81        sprintf(envbuffer, "bootcmd%d", boot_choice);
  82        if (env_get(envbuffer)) {
  83                sprintf(envbuffer, "run bootcmd%d", boot_choice);
  84                env_set("bootcmd", envbuffer);
  85        } else
  86                env_set("bootcmd", "");
  87
  88        return 0;
  89}
  90#endif
  91
  92int dram_init(void)
  93{
  94        gd->ram_size = SZ_512M;
  95        return 0;
  96}
  97
  98#if defined(CONFIG_OF_BOARD_SETUP)
  99int ft_board_setup(void *fdt, bd_t *bd)
 100{
 101        static const char disabled[] = "disabled";
 102        u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
 103
 104        if (!(reg & PWRDOM_STAT_SATA))
 105                do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
 106                        disabled, sizeof(disabled), 1);
 107
 108        if (!(reg & PWRDOM_STAT_EMMC))
 109                do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
 110                        disabled, sizeof(disabled), 1);
 111
 112        return 0;
 113}
 114#endif
 115
 116static int is_highbank(void)
 117{
 118        uint32_t midr;
 119
 120        asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
 121
 122        return (midr & 0xfff0) == 0xc090;
 123}
 124
 125void reset_cpu(ulong addr)
 126{
 127        writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
 128        if (is_highbank())
 129                writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
 130        else
 131                writel(0x1, HB_SREG_A15_PWR_CTRL);
 132
 133        wfi();
 134}
 135
 136/*
 137 * turn off the override before transferring control to Linux, since Linux
 138 * may not support spread spectrum.
 139 */
 140void arch_preboot_os(void)
 141{
 142        cphy_disable_overrides();
 143}
 144