LXR uboot/include/configs/exynos5-common.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2013 Samsung Electronics
   4 *
   5 * Configuration settings for the SAMSUNG EXYNOS5 board.
   6 */
   7
   8#ifndef __CONFIG_EXYNOS5_COMMON_H
   9#define __CONFIG_EXYNOS5_COMMON_H
  10
  11#define CONFIG_EXYNOS5                  /* Exynos5 Family */
  12
  13#include "exynos-common.h"
  14
  15#define CONFIG_EXYNOS_SPL
  16
  17#ifdef FTRACE
  18#define CONFIG_TRACE
  19#define CONFIG_TRACE_BUFFER_SIZE        (16 << 20)
  20#define CONFIG_TRACE_EARLY_SIZE         (8 << 20)
  21#define CONFIG_TRACE_EARLY
  22#define CONFIG_TRACE_EARLY_ADDR         0x50000000
  23#endif
  24
  25/* Enable ACE acceleration for SHA1 and SHA256 */
  26#define CONFIG_EXYNOS_ACE_SHA
  27
  28/* Power Down Modes */
  29#define S5P_CHECK_SLEEP                 0x00000BAD
  30#define S5P_CHECK_DIDLE                 0xBAD00000
  31#define S5P_CHECK_LPA                   0xABAD0000
  32
  33/* Offset for inform registers */
  34#define INFORM0_OFFSET                  0x800
  35#define INFORM1_OFFSET                  0x804
  36#define INFORM2_OFFSET                  0x808
  37#define INFORM3_OFFSET                  0x80c
  38
  39/* select serial console configuration */
  40#define EXYNOS5_DEFAULT_UART_OFFSET     0x010000
  41
  42/* Thermal Management Unit */
  43#define CONFIG_EXYNOS_TMU
  44
  45/* MMC SPL */
  46#define COPY_BL2_FNPTR_ADDR     0x02020030
  47#define CONFIG_SUPPORT_EMMC_BOOT
  48
  49/* specific .lds file */
  50
  51/* Boot Argument Buffer Size */
  52/* memtest works on */
  53#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  54#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
  55#define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
  56
  57#define CONFIG_RD_LVL
  58
  59#define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE
  60#define PHYS_SDRAM_1_SIZE       SDRAM_BANK_SIZE
  61#define PHYS_SDRAM_2            (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
  62#define PHYS_SDRAM_2_SIZE       SDRAM_BANK_SIZE
  63#define PHYS_SDRAM_3            (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
  64#define PHYS_SDRAM_3_SIZE       SDRAM_BANK_SIZE
  65#define PHYS_SDRAM_4            (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
  66#define PHYS_SDRAM_4_SIZE       SDRAM_BANK_SIZE
  67#define PHYS_SDRAM_5            (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
  68#define PHYS_SDRAM_5_SIZE       SDRAM_BANK_SIZE
  69#define PHYS_SDRAM_6            (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
  70#define PHYS_SDRAM_6_SIZE       SDRAM_BANK_SIZE
  71#define PHYS_SDRAM_7            (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
  72#define PHYS_SDRAM_7_SIZE       SDRAM_BANK_SIZE
  73#define PHYS_SDRAM_8            (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
  74#define PHYS_SDRAM_8_SIZE       SDRAM_BANK_SIZE
  75
  76#define CONFIG_SYS_MONITOR_BASE 0x00000000
  77
  78#define CONFIG_SYS_MMC_ENV_DEV          0
  79
  80#define CONFIG_SECURE_BL1_ONLY
  81
  82/* Secure FW size configuration */
  83#ifdef CONFIG_SECURE_BL1_ONLY
  84#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */
  85#else
  86#define CONFIG_SEC_FW_SIZE 0
  87#endif
  88
  89/* Configuration of BL1, BL2, ENV Blocks on mmc */
  90#define CONFIG_RES_BLOCK_SIZE   (512)
  91#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
  92#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */
  93#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
  94
  95#define CONFIG_BL1_OFFSET       (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
  96#define CONFIG_BL2_OFFSET       (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
  97
  98/* U-Boot copy size from boot Media to DRAM.*/
  99#define BL2_START_OFFSET        (CONFIG_BL2_OFFSET/512)
 100#define BL2_SIZE_BLOC_COUNT     (CONFIG_BL2_SIZE/512)
 101
 102#define EXYNOS_COPY_SPI_FNPTR_ADDR      0x02020058
 103#define SPI_FLASH_UBOOT_POS     (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
 104
 105/* I2C */
 106#define CONFIG_SYS_I2C_S3C24X0
 107#define CONFIG_SYS_I2C_S3C24X0_SPEED    100000          /* 100 Kbps */
 108#define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
 109
 110/* SPI */
 111#ifdef CONFIG_SPI_FLASH
 112#define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 113#define CONFIG_SF_DEFAULT_SPEED         50000000
 114#endif
 115
 116#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
 117#define CONFIG_ENV_SPI_MODE     SPI_MODE_0
 118#define CONFIG_ENV_SECT_SIZE    CONFIG_ENV_SIZE
 119#define CONFIG_ENV_SPI_BUS      1
 120#define CONFIG_ENV_SPI_MAX_HZ   50000000
 121#endif
 122
 123/* Ethernet Controllor Driver */
 124#ifdef CONFIG_CMD_NET
 125#define CONFIG_ENV_SROM_BANK            1
 126#endif /*CONFIG_CMD_NET*/
 127
 128/* Enable Time Command */
 129
 130/* USB */
 131
 132/* USB boot mode */
 133#define CONFIG_USB_BOOTING
 134#define EXYNOS_COPY_USB_FNPTR_ADDR      0x02020070
 135#define EXYNOS_USB_SECONDARY_BOOT       0xfeed0002
 136#define EXYNOS_IRAM_SECONDARY_BASE      0x02020018
 137
 138#define BOOT_TARGET_DEVICES(func) \
 139        func(MMC, mmc, 1) \
 140        func(MMC, mmc, 0) \
 141        func(MMC, mmc, 2) \
 142        func(PXE, pxe, na) \
 143        func(DHCP, dhcp, na)
 144
 145#include <config_distro_bootcmd.h>
 146
 147#ifndef MEM_LAYOUT_ENV_SETTINGS
 148/* 2GB RAM, bootm size of 256M, load scripts after that */
 149#define MEM_LAYOUT_ENV_SETTINGS \
 150        "bootm_size=0x10000000\0" \
 151        "kernel_addr_r=0x42000000\0" \
 152        "fdt_addr_r=0x43000000\0" \
 153        "ramdisk_addr_r=0x43300000\0" \
 154        "scriptaddr=0x50000000\0" \
 155        "pxefile_addr_r=0x51000000\0"
 156#endif
 157
 158#ifndef EXYNOS_DEVICE_SETTINGS
 159#define EXYNOS_DEVICE_SETTINGS \
 160        "stdin=serial\0" \
 161        "stdout=serial\0" \
 162        "stderr=serial\0"
 163#endif
 164
 165#ifndef EXYNOS_FDTFILE_SETTING
 166#define EXYNOS_FDTFILE_SETTING
 167#endif
 168
 169#define CONFIG_EXTRA_ENV_SETTINGS \
 170        EXYNOS_DEVICE_SETTINGS \
 171        EXYNOS_FDTFILE_SETTING \
 172        MEM_LAYOUT_ENV_SETTINGS \
 173        BOOTENV
 174
 175#endif  /* __CONFIG_EXYNOS5_COMMON_H */
 176