LXR uboot/include/configs/r0p7734.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Configuation settings for the Renesas Solutions r0p7734 board
   4 *
   5 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   6 */
   7
   8#ifndef __R0P7734_H
   9#define __R0P7734_H
  10
  11#define CONFIG_CPU_SH7734       1
  12#define CONFIG_400MHZ_MODE      1
  13
  14#define CONFIG_DISPLAY_BOARDINFO
  15#undef  CONFIG_SHOW_BOOT_PROGRESS
  16
  17/* Ether */
  18#define CONFIG_SH_ETHER_USE_PORT (0)
  19#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
  20#define CONFIG_PHY_SMSC 1
  21#define CONFIG_BITBANGMII
  22#define CONFIG_BITBANGMII_MULTI
  23#define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
  24#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
  25
  26/* undef to save memory */
  27/* List of legal baudrate settings for this board */
  28#define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  29
  30/* SCIF */
  31#define CONFIG_SCIF                     1
  32#define CONFIG_CONS_SCIF3       1
  33
  34/* Suppress display of console information at boot */
  35
  36/* SDRAM */
  37#define CONFIG_SYS_SDRAM_BASE   (0x88000000)
  38#define CONFIG_SYS_SDRAM_SIZE   (128 * 1024 * 1024)
  39#define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  40
  41#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  42#define CONFIG_SYS_MEMTEST_END   (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
  43/* Enable alternate, more extensive, memory test */
  44/* Scratch address used by the alternate memory test */
  45#undef  CONFIG_SYS_MEMTEST_SCRATCH
  46
  47/* Enable temporary baudrate change while serial download */
  48#undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  49
  50/* FLASH */
  51#undef  CONFIG_SYS_FLASH_QUIET_TEST
  52#define CONFIG_SYS_FLASH_EMPTY_INFO
  53#define CONFIG_SYS_FLASH_BASE   (0xA0000000)
  54#define CONFIG_SYS_MAX_FLASH_SECT       512
  55
  56/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
  57#define CONFIG_SYS_MAX_FLASH_BANKS      1
  58#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  59
  60/* Timeout for Flash erase operations (in ms) */
  61#define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
  62/* Timeout for Flash write operations (in ms) */
  63#define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
  64/* Timeout for Flash set sector lock bit operations (in ms) */
  65#define CONFIG_SYS_FLASH_LOCK_TOUT      (3 * 1000)
  66/* Timeout for Flash clear lock bit operations (in ms) */
  67#define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
  68
  69/*
  70 * Use hardware flash sectors protection instead
  71 * of U-Boot software protection
  72 */
  73#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
  74
  75/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
  76#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
  77/* Monitor size */
  78#define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  79/* Size of DRAM reserved for malloc() use */
  80#define CONFIG_SYS_MALLOC_LEN   (256 * 1024)
  81#define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
  82
  83/* ENV setting */
  84#define CONFIG_ENV_OVERWRITE    1
  85#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
  86#define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
  87#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
  88/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
  89#define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
  90#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
  91
  92/* Board Clock */
  93#if defined(CONFIG_400MHZ_MODE)
  94#define CONFIG_SYS_CLK_FREQ 50000000
  95#else
  96#define CONFIG_SYS_CLK_FREQ 44444444
  97#endif
  98#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  99
 100#endif  /* __R0P7734_H */
 101