LXR uboot/arch/arm/mach-uniphier/bcu/bcu-ld4.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2011-2014 Panasonic Corporation
   4 * Copyright (C) 2015-2016 Socionext Inc.
   5 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   6 */
   7
   8#include <linux/io.h>
   9
  10#include "../init.h"
  11#include "bcu-regs.h"
  12
  13#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
  14
  15void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
  16{
  17        int shift;
  18
  19        writel(0x44444444, BCSCR0); /* 0x20000000-0x3fffffff: ASM bus */
  20        writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */
  21        writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */
  22        writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */
  23        writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */
  24
  25        /* Specify DDR channel */
  26        shift = bd->dram_ch[0].size / 0x04000000 * 4;
  27        writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
  28
  29        shift -= 32;
  30        writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */
  31
  32        shift -= 32;
  33        writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
  34}
  35