LXR uboot/board/freescale/mx6sllevk/mx6sllevk.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <asm/arch/clock.h>
   7#include <asm/arch/crm_regs.h>
   8#include <asm/arch/iomux.h>
   9#include <asm/arch/imx-regs.h>
  10#include <asm/arch/mx6-pins.h>
  11#include <asm/arch/sys_proto.h>
  12#include <asm/gpio.h>
  13#include <asm/mach-imx/iomux-v3.h>
  14#include <asm/mach-imx/boot_mode.h>
  15#include <asm/io.h>
  16#include <common.h>
  17#include <linux/sizes.h>
  18#include <mmc.h>
  19#include <power/pmic.h>
  20#include <power/pfuze100_pmic.h>
  21#include "../common/pfuze.h"
  22
  23DECLARE_GLOBAL_DATA_PTR;
  24
  25#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |             \
  26        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
  27        PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  28
  29int dram_init(void)
  30{
  31        gd->ram_size = imx_ddr_size();
  32
  33        return 0;
  34}
  35
  36static iomux_v3_cfg_t const uart1_pads[] = {
  37        MX6_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  38        MX6_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  39};
  40
  41static iomux_v3_cfg_t const wdog_pads[] = {
  42        MX6_PAD_WDOG_B__WDOG1_B | MUX_PAD_CTRL(NO_PAD_CTRL),
  43};
  44
  45static void setup_iomux_uart(void)
  46{
  47        imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
  48}
  49
  50#ifdef CONFIG_DM_PMIC_PFUZE100
  51int power_init_board(void)
  52{
  53        struct udevice *dev;
  54        int ret;
  55        u32 dev_id, rev_id, i;
  56        u32 switch_num = 6;
  57        u32 offset = PFUZE100_SW1CMODE;
  58
  59        ret = pmic_get("pfuze100", &dev);
  60        if (ret == -ENODEV)
  61                return 0;
  62
  63        if (ret != 0)
  64                return ret;
  65
  66        dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
  67        rev_id = pmic_reg_read(dev, PFUZE100_REVID);
  68        printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
  69
  70
  71        /* Init mode to APS_PFM */
  72        pmic_reg_write(dev, PFUZE100_SW1ABMODE, APS_PFM);
  73
  74        for (i = 0; i < switch_num - 1; i++)
  75                pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM);
  76
  77        /* set SW1AB staby volatage 0.975V */
  78        pmic_clrsetbits(dev, PFUZE100_SW1ABSTBY, 0x3f, 0x1b);
  79
  80        /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
  81        pmic_clrsetbits(dev, PFUZE100_SW1ABCONF, 0xc0, 0x40);
  82
  83        /* set SW1C staby volatage 0.975V */
  84        pmic_clrsetbits(dev, PFUZE100_SW1CSTBY, 0x3f, 0x1b);
  85
  86        /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
  87        pmic_clrsetbits(dev, PFUZE100_SW1CCONF, 0xc0, 0x40);
  88
  89        return 0;
  90}
  91#endif
  92
  93int board_early_init_f(void)
  94{
  95        setup_iomux_uart();
  96
  97        return 0;
  98}
  99
 100int board_init(void)
 101{
 102        /* Address of boot parameters */
 103        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 104
 105        return 0;
 106}
 107
 108int board_late_init(void)
 109{
 110        imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 111
 112        return 0;
 113}
 114
 115int checkboard(void)
 116{
 117        puts("Board: MX6SLL EVK\n");
 118
 119        return 0;
 120}
 121
 122int board_mmc_get_env_dev(int devno)
 123{
 124        return devno;
 125}
 126
 127int mmc_map_to_kernel_blk(int devno)
 128{
 129        return devno;
 130}
 131