LXR uboot/board/freescale/p1010rdb/spl.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/* Copyright 2013 Freescale Semiconductor, Inc.
   3 */
   4
   5#include <common.h>
   6#include <console.h>
   7#include <environment.h>
   8#include <ns16550.h>
   9#include <malloc.h>
  10#include <mmc.h>
  11#include <nand.h>
  12#include <i2c.h>
  13#include <fsl_esdhc.h>
  14#include <spi_flash.h>
  15#include "../common/spl.h"
  16
  17DECLARE_GLOBAL_DATA_PTR;
  18
  19phys_size_t get_effective_memsize(void)
  20{
  21        return CONFIG_SYS_L2_SIZE;
  22}
  23
  24void board_init_f(ulong bootflag)
  25{
  26        u32 plat_ratio;
  27        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  28        struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
  29
  30        console_init_f();
  31
  32        /* Clock configuration to access CPLD using IFC(GPCM) */
  33        setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
  34
  35#ifdef CONFIG_TARGET_P1010RDB_PB
  36        setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS);
  37#endif
  38
  39        /* initialize selected port with appropriate baud rate */
  40        plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
  41        plat_ratio >>= 1;
  42        gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
  43
  44        NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  45                     gd->bus_clk / 16 / CONFIG_BAUDRATE);
  46
  47#ifdef CONFIG_SPL_MMC_BOOT
  48        puts("\nSD boot...\n");
  49#elif defined(CONFIG_SPL_SPI_BOOT)
  50        puts("\nSPI Flash boot...\n");
  51#endif
  52        /* copy code to RAM and jump to it - this should not return */
  53        /* NOTE - code has to be copied out of NAND buffer before
  54         * other blocks can be read.
  55        */
  56        relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
  57}
  58
  59void board_init_r(gd_t *gd, ulong dest_addr)
  60{
  61        /* Pointer is writable since we allocated a register for it */
  62        gd = (gd_t *)CONFIG_SPL_GD_ADDR;
  63        bd_t *bd;
  64
  65        memset(gd, 0, sizeof(gd_t));
  66        bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
  67        memset(bd, 0, sizeof(bd_t));
  68        gd->bd = bd;
  69        bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
  70        bd->bi_memsize = CONFIG_SYS_L2_SIZE;
  71
  72        arch_cpu_init();
  73        get_clocks();
  74        mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  75                        CONFIG_SPL_RELOC_MALLOC_SIZE);
  76        gd->flags |= GD_FLG_FULL_MALLOC_INIT;
  77
  78#ifndef CONFIG_SPL_NAND_BOOT
  79        env_init();
  80#endif
  81#ifdef CONFIG_SPL_MMC_BOOT
  82        mmc_initialize(bd);
  83#endif
  84
  85        /* relocate environment function pointers etc. */
  86#ifdef CONFIG_SPL_NAND_BOOT
  87        nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  88                            (uchar *)CONFIG_ENV_ADDR);
  89                            gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
  90        gd->env_valid = ENV_VALID;
  91#else
  92        env_relocate();
  93#endif
  94
  95        i2c_init_all();
  96
  97        dram_init();
  98#ifdef CONFIG_SPL_NAND_BOOT
  99        puts("\nTertiary program loader running in sram...");
 100#else
 101        puts("\nSecond program loader running in sram...");
 102#endif
 103
 104#ifdef CONFIG_SPL_MMC_BOOT
 105        mmc_boot();
 106#elif defined(CONFIG_SPL_SPI_BOOT)
 107        fsl_spi_boot();
 108#elif defined(CONFIG_SPL_NAND_BOOT)
 109        nand_boot();
 110#endif
 111}
 112