LXR uboot/board/freescale/t4rdb/cpld.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/**
   3 * Copyright 2014 Freescale Semiconductor
   4 *
   5 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
   6 *
   7 * This file provides support for the board-specific CPLD used on some Freescale
   8 * reference boards.
   9 *
  10 * The following macros need to be defined:
  11 *
  12 * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the
  13 * CPLD register map
  14 *
  15 */
  16
  17#include <common.h>
  18#include <command.h>
  19#include <asm/io.h>
  20
  21#include "cpld.h"
  22
  23u8 cpld_read(unsigned int reg)
  24{
  25        void *p = (void *)CONFIG_SYS_CPLD_BASE;
  26
  27        return in_8(p + reg);
  28}
  29
  30void cpld_write(unsigned int reg, u8 value)
  31{
  32        void *p = (void *)CONFIG_SYS_CPLD_BASE;
  33
  34        out_8(p + reg, value);
  35}
  36
  37/**
  38 * Set the boot bank to the alternate bank
  39 */
  40void cpld_set_altbank(void)
  41{
  42        u8 val, curbank, altbank, override;
  43
  44        val = CPLD_READ(vbank);
  45        curbank = val & CPLD_BANK_SEL_MASK;
  46
  47        switch (curbank) {
  48        case CPLD_SELECT_BANK0:
  49        case CPLD_SELECT_BANK4:
  50                altbank = CPLD_SELECT_BANK4;
  51                CPLD_WRITE(vbank, altbank);
  52                override = CPLD_READ(software_on);
  53                CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN);
  54                CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET);
  55                break;
  56        default:
  57                printf("CPLD Altbank Fail: Invalid value!\n");
  58                return;
  59        }
  60}
  61
  62/**
  63 * Set the boot bank to the default bank
  64 */
  65void cpld_set_defbank(void)
  66{
  67        u8 val;
  68
  69        val = CPLD_DEFAULT_BANK;
  70
  71        CPLD_WRITE(global_reset, val);
  72}
  73
  74#ifdef DEBUG
  75static void cpld_dump_regs(void)
  76{
  77        printf("chip_id1        = 0x%02x\n", CPLD_READ(chip_id1));
  78        printf("chip_id2        = 0x%02x\n", CPLD_READ(chip_id2));
  79        printf("sw_maj_ver      = 0x%02x\n", CPLD_READ(sw_maj_ver));
  80        printf("sw_min_ver      = 0x%02x\n", CPLD_READ(sw_min_ver));
  81        printf("hw_ver          = 0x%02x\n", CPLD_READ(hw_ver));
  82        printf("software_on     = 0x%02x\n", CPLD_READ(software_on));
  83        printf("cfg_rcw_src     = 0x%02x\n", CPLD_READ(cfg_rcw_src));
  84        printf("res0            = 0x%02x\n", CPLD_READ(res0));
  85        printf("vbank           = 0x%02x\n", CPLD_READ(vbank));
  86        printf("sw1_sysclk      = 0x%02x\n", CPLD_READ(sw1_sysclk));
  87        printf("sw2_status      = 0x%02x\n", CPLD_READ(sw2_status));
  88        printf("sw3_status      = 0x%02x\n", CPLD_READ(sw3_status));
  89        printf("sw4_status      = 0x%02x\n", CPLD_READ(sw4_status));
  90        printf("sys_reset       = 0x%02x\n", CPLD_READ(sys_reset));
  91        printf("global_reset    = 0x%02x\n", CPLD_READ(global_reset));
  92        printf("res1            = 0x%02x\n", CPLD_READ(res1));
  93        putc('\n');
  94}
  95#endif
  96
  97#ifndef CONFIG_SPL_BUILD
  98int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  99{
 100        int rc = 0;
 101
 102        if (argc <= 1)
 103                return cmd_usage(cmdtp);
 104
 105        if (strcmp(argv[1], "reset") == 0) {
 106                if (strcmp(argv[2], "altbank") == 0)
 107                        cpld_set_altbank();
 108                else
 109                        cpld_set_defbank();
 110#ifdef DEBUG
 111        } else if (strcmp(argv[1], "dump") == 0) {
 112                cpld_dump_regs();
 113#endif
 114        } else
 115                rc = cmd_usage(cmdtp);
 116
 117        return rc;
 118}
 119
 120U_BOOT_CMD(
 121        cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
 122        "Reset the board or alternate bank",
 123        "reset - reset to default bank\n"
 124        "cpld reset altbank - reset to alternate bank\n"
 125#ifdef DEBUG
 126        "cpld dump - display the CPLD registers\n"
 127#endif
 128        );
 129#endif
 130