LXR uboot/board/xilinx/zynq/board.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
   4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
   5 */
   6
   7#include <common.h>
   8#include <dm/uclass.h>
   9#include <fdtdec.h>
  10#include <fpga.h>
  11#include <malloc.h>
  12#include <mmc.h>
  13#include <watchdog.h>
  14#include <wdt.h>
  15#include <zynqpl.h>
  16#include <asm/arch/hardware.h>
  17#include <asm/arch/sys_proto.h>
  18
  19DECLARE_GLOBAL_DATA_PTR;
  20
  21#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
  22static struct udevice *watchdog_dev;
  23#endif
  24
  25#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
  26int board_early_init_f(void)
  27{
  28# if defined(CONFIG_WDT)
  29        /* bss is not cleared at time when watchdog_reset() is called */
  30        watchdog_dev = NULL;
  31# endif
  32
  33        return 0;
  34}
  35#endif
  36
  37int board_init(void)
  38{
  39#if defined(CONFIG_ENV_IS_IN_EEPROM) && !defined(CONFIG_SPL_BUILD)
  40        unsigned char eepromsel = CONFIG_SYS_I2C_MUX_EEPROM_SEL;
  41#endif
  42
  43#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
  44        if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
  45                debug("Watchdog: Not found by seq!\n");
  46                if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
  47                        puts("Watchdog: Not found!\n");
  48                        return 0;
  49                }
  50        }
  51
  52        wdt_start(watchdog_dev, 0, 0);
  53        puts("Watchdog: Started\n");
  54# endif
  55
  56#if defined(CONFIG_ENV_IS_IN_EEPROM) && !defined(CONFIG_SPL_BUILD)
  57        if (eeprom_write(CONFIG_SYS_I2C_MUX_ADDR, 0, &eepromsel, 1))
  58                puts("I2C:EEPROM selection failed\n");
  59#endif
  60        return 0;
  61}
  62
  63int board_late_init(void)
  64{
  65        int env_targets_len = 0;
  66        const char *mode;
  67        char *new_targets;
  68        char *env_targets;
  69
  70        switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
  71        case ZYNQ_BM_QSPI:
  72                mode = "qspi";
  73                env_set("modeboot", "qspiboot");
  74                break;
  75        case ZYNQ_BM_NAND:
  76                mode = "nand";
  77                env_set("modeboot", "nandboot");
  78                break;
  79        case ZYNQ_BM_NOR:
  80                mode = "nor";
  81                env_set("modeboot", "norboot");
  82                break;
  83        case ZYNQ_BM_SD:
  84                mode = "mmc";
  85                env_set("modeboot", "sdboot");
  86                break;
  87        case ZYNQ_BM_JTAG:
  88                mode = "pxe dhcp";
  89                env_set("modeboot", "jtagboot");
  90                break;
  91        default:
  92                mode = "";
  93                env_set("modeboot", "");
  94                break;
  95        }
  96
  97        /*
  98         * One terminating char + one byte for space between mode
  99         * and default boot_targets
 100         */
 101        env_targets = env_get("boot_targets");
 102        if (env_targets)
 103                env_targets_len = strlen(env_targets);
 104
 105        new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
 106        if (!new_targets)
 107                return -ENOMEM;
 108
 109        sprintf(new_targets, "%s %s", mode,
 110                env_targets ? env_targets : "");
 111
 112        env_set("boot_targets", new_targets);
 113
 114        return 0;
 115}
 116
 117#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
 118int dram_init_banksize(void)
 119{
 120        return fdtdec_setup_memory_banksize();
 121}
 122
 123int dram_init(void)
 124{
 125        if (fdtdec_setup_mem_size_base() != 0)
 126                return -EINVAL;
 127
 128        zynq_ddrc_init();
 129
 130        return 0;
 131}
 132#else
 133int dram_init(void)
 134{
 135        gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 136                                    CONFIG_SYS_SDRAM_SIZE);
 137
 138        zynq_ddrc_init();
 139
 140        return 0;
 141}
 142#endif
 143
 144#if defined(CONFIG_WATCHDOG)
 145/* Called by macro WATCHDOG_RESET */
 146void watchdog_reset(void)
 147{
 148# if !defined(CONFIG_SPL_BUILD)
 149        static ulong next_reset;
 150        ulong now;
 151
 152        if (!watchdog_dev)
 153                return;
 154
 155        now = timer_get_us();
 156
 157        /* Do not reset the watchdog too often */
 158        if (now > next_reset) {
 159                wdt_reset(watchdog_dev);
 160                next_reset = now + 1000;
 161        }
 162# endif
 163}
 164#endif
 165