1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuation settings for the Renesas RSK2+SH7269 board 4 * 5 * Copyright (C) 2012 Renesas Electronics Europe Ltd. 6 * Copyright (C) 2012 Phil Edworthy 7 */ 8 9#ifndef __RSK7269_H 10#define __RSK7269_H 11 12#define CONFIG_CPU_SH7269 1 13 14#define CONFIG_DISPLAY_BOARDINFO 15 16#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 17 18#define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ 19 20/* Serial */ 21#define CONFIG_CONS_SCIF7 22 23/* Memory */ 24/* u-boot relocated to top 256KB of ram */ 25#define CONFIG_SYS_SDRAM_BASE 0x0C000000 26#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 27 28#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 29#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 30#define CONFIG_SYS_MALLOC_LEN (256 * 1024) 31#define CONFIG_SYS_MONITOR_LEN (128 * 1024) 32#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) 33 34/* NOR Flash */ 35#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 36#define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ 37#define CONFIG_SYS_MAX_FLASH_BANKS 1 38#define CONFIG_SYS_MAX_FLASH_SECT 512 39 40#define CONFIG_ENV_OFFSET (128 * 1024) 41#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 42#define CONFIG_ENV_SECT_SIZE (64 * 1024) 43#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 44 45/* Board Clock */ 46#define CONFIG_SYS_CLK_FREQ 66125000 47#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 48#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 49#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 50 51#endif /* __RSK7269_H */ 52