uboot/arch/m68k/cpu/mcf532x/cpu.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 *
   4 * (C) Copyright 2000-2003
   5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6 *
   7 * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
   8 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   9 */
  10
  11#include <common.h>
  12#include <vsprintf.h>
  13#include <watchdog.h>
  14#include <command.h>
  15#include <netdev.h>
  16
  17#include <asm/immap.h>
  18#include <asm/io.h>
  19
  20DECLARE_GLOBAL_DATA_PTR;
  21
  22int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  23{
  24        rcm_t *rcm = (rcm_t *) (MMAP_RCM);
  25
  26        udelay(1000);
  27        setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
  28
  29        /* we don't return! */
  30        return 0;
  31};
  32
  33#if defined(CONFIG_DISPLAY_CPUINFO)
  34int print_cpuinfo(void)
  35{
  36        ccm_t *ccm = (ccm_t *) MMAP_CCM;
  37        u16 msk;
  38        u16 id = 0;
  39        u8 ver;
  40
  41        puts("CPU:   ");
  42        msk = (in_be16(&ccm->cir) >> 6);
  43        ver = (in_be16(&ccm->cir) & 0x003f);
  44        switch (msk) {
  45#ifdef CONFIG_MCF5301x
  46        case 0x78:
  47                id = 53010;
  48                break;
  49        case 0x77:
  50                id = 53012;
  51                break;
  52        case 0x76:
  53                id = 53015;
  54                break;
  55        case 0x74:
  56                id = 53011;
  57                break;
  58        case 0x73:
  59                id = 53013;
  60                break;
  61#endif
  62#ifdef CONFIG_MCF532x
  63        case 0x54:
  64                id = 5329;
  65                break;
  66        case 0x59:
  67                id = 5328;
  68                break;
  69        case 0x61:
  70                id = 5327;
  71                break;
  72        case 0x65:
  73                id = 5373;
  74                break;
  75        case 0x68:
  76                id = 53721;
  77                break;
  78        case 0x69:
  79                id = 5372;
  80                break;
  81        case 0x6B:
  82                id = 5372;
  83                break;
  84#endif
  85        }
  86
  87        if (id) {
  88                char buf1[32], buf2[32];
  89
  90                printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
  91                       ver);
  92                printf("       CPU CLK %s MHz BUS CLK %s MHz\n",
  93                       strmhz(buf1, gd->cpu_clk),
  94                       strmhz(buf2, gd->bus_clk));
  95        }
  96
  97        return 0;
  98};
  99#endif /* CONFIG_DISPLAY_CPUINFO */
 100
 101#if defined(CONFIG_WATCHDOG)
 102/* Called by macro WATCHDOG_RESET */
 103void watchdog_reset(void)
 104{
 105        wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 106
 107        /* Count register */
 108        out_be16(&wdp->sr, 0x5555);
 109        out_be16(&wdp->sr, 0xaaaa);
 110}
 111
 112int watchdog_disable(void)
 113{
 114        wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 115
 116        /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
 117        /* halted watchdog timer */
 118        setbits_be16(&wdp->cr, WTM_WCR_HALTED);
 119
 120        puts("WATCHDOG:disabled\n");
 121        return (0);
 122}
 123
 124int watchdog_init(void)
 125{
 126        wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 127        u32 wdog_module = 0;
 128
 129        /* set timeout and enable watchdog */
 130        wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
 131#ifdef CONFIG_M5329
 132        out_be16(&wdp->mr, wdog_module / 8192);
 133#else
 134        out_be16(&wdp->mr, wdog_module / 4096);
 135#endif
 136
 137        out_be16(&wdp->cr, WTM_WCR_EN);
 138        puts("WATCHDOG:enabled\n");
 139
 140        return (0);
 141}
 142#endif                          /* CONFIG_WATCHDOG */
 143
 144#if defined(CONFIG_MCFFEC)
 145/* Default initializations for MCFFEC controllers.  To override,
 146 * create a board-specific function called:
 147 *      int board_eth_init(bd_t *bis)
 148 */
 149
 150int cpu_eth_init(bd_t *bis)
 151{
 152        return mcffec_initialize(bis);
 153}
 154#endif
 155