LXR uboot/arch/powerpc/cpu/mpc8xxx/fsl

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <common.h>
   7#include <asm/fsl_lbc.h>
   8
   9#ifdef CONFIG_MPC83xx
  10#include "../mpc83xx/elbc/elbc.h"
  11#endif
  12
  13#ifdef CONFIG_MPC85xx
  14/* Boards should provide their own version of this if they use lbc sdram */
  15static void __lbc_sdram_init(void)
  16{
  17        /* Do nothing */
  18}
  19void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
  20#endif
  21
  22
  23void print_lbc_regs(void)
  24{
  25        int i;
  26
  27        printf("\nLocal Bus Controller Registers\n");
  28        for (i = 0; i < 8; i++) {
  29                printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
  30                       i, get_lbc_br(i), i, get_lbc_or(i));
  31        }
  32        printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
  33                       get_lbc_lbcr(), get_lbc_lcrr());
  34}
  35
  36void init_early_memctl_regs(void)
  37{
  38        uint init_br1 = 1;
  39
  40#ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
  41        /* Set the local bus monitor timeout value to the maximum */
  42        clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
  43#endif
  44
  45#ifdef CONFIG_MPC85xx
  46        /* if cs1 is already set via debugger, leave cs0/cs1 alone */
  47        if (get_lbc_br(1) & BR_V)
  48                init_br1 = 0;
  49#endif
  50
  51        /*
  52         * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at
  53         * preliminary addresses - these have to be modified later
  54         * when FLASH size has been determined
  55         */
  56#if defined(CONFIG_SYS_OR0_REMAP)
  57        set_lbc_or(0, CONFIG_SYS_OR0_REMAP);
  58#endif
  59#if defined(CONFIG_SYS_OR1_REMAP)
  60        set_lbc_or(1, CONFIG_SYS_OR1_REMAP);
  61#endif
  62        /* now restrict to preliminary range */
  63        if (init_br1) {
  64#if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
  65                set_lbc_br(0, CONFIG_SYS_BR0_PRELIM);
  66                set_lbc_or(0, CONFIG_SYS_OR0_PRELIM);
  67#endif
  68
  69#if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
  70                set_lbc_or(1, CONFIG_SYS_OR1_PRELIM);
  71                set_lbc_br(1, CONFIG_SYS_BR1_PRELIM);
  72#endif
  73        }
  74
  75#if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
  76        set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
  77        set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
  78#endif
  79
  80#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
  81        set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
  82        set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
  83#endif
  84
  85#if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
  86        set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
  87        set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
  88#endif
  89
  90#if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
  91        set_lbc_or(5, CONFIG_SYS_OR5_PRELIM);
  92        set_lbc_br(5, CONFIG_SYS_BR5_PRELIM);
  93#endif
  94
  95#if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
  96        set_lbc_or(6, CONFIG_SYS_OR6_PRELIM);
  97        set_lbc_br(6, CONFIG_SYS_BR6_PRELIM);
  98#endif
  99
 100#if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
 101        set_lbc_or(7, CONFIG_SYS_OR7_PRELIM);
 102        set_lbc_br(7, CONFIG_SYS_BR7_PRELIM);
 103#endif
 104}
 105
 106/*
 107 * Configures a UPM. The function requires the respective MxMR to be set
 108 * before calling this function. "size" is the number or entries, not a sizeof.
 109 */
 110void upmconfig(uint upm, uint *table, uint size)
 111{
 112        fsl_lbc_t *lbc = LBC_BASE_ADDR;
 113        int i, mad, old_mad = 0;
 114        u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK);
 115        u32 msel = BR_UPMx_TO_MSEL(upm);
 116        u32 *mxmr = &lbc->mamr + upm;
 117        volatile u8 *dummy = NULL;
 118
 119        if (upm < UPMA || upm > UPMC) {
 120                printf("Error: %s() Bad UPM index %d\n", __func__, upm);
 121                hang();
 122        }
 123
 124        /*
 125         * Find the address for the dummy write - scan all of the BRs until we
 126         * find one matching the UPM and extract the base address bits from it.
 127         */
 128        for (i = 0; i < 8; i++) {
 129                if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) {
 130                        dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
 131                        break;
 132                }
 133        }
 134
 135        if (!dummy) {
 136                printf("Error: %s() No matching BR\n", __func__);
 137                hang();
 138        }
 139
 140        /* Program UPM using steps outlined by the reference manual */
 141        for (i = 0; i < size; i++) {
 142                out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i);
 143                out_be32(&lbc->mdr, table[i]);
 144                (void)in_be32(&lbc->mdr);
 145                *dummy = 0;
 146                do {
 147                        mad = in_be32(mxmr) & MxMR_MAD_MSK;
 148                } while (mad <= old_mad && !(!mad && i == (size-1)));
 149                old_mad = mad;
 150        }
 151
 152        /* Return to normal operation */
 153        out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM);
 154}
 155