LXR uboot/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2010, 2018
   4 * Allied Telesis <www.alliedtelesis.com>
   5 */
   6
   7#include <common.h>
   8#include <miiphy.h>
   9#include <netdev.h>
  10#include <led.h>
  11#include <linux/io.h>
  12#include <asm/arch/cpu.h>
  13#include <asm/arch/soc.h>
  14#include <asm/arch/mpp.h>
  15#include <asm/arch/gpio.h>
  16
  17#define SBX81LIFXCAT_OE_LOW             (~0)
  18#define SBX81LIFXCAT_OE_HIGH            (~BIT(11))
  19#define SBX81LIFXCAT_OE_VAL_LOW         (0)
  20#define SBX81LIFXCAT_OE_VAL_HIGH        (BIT(11))
  21
  22DECLARE_GLOBAL_DATA_PTR;
  23
  24int board_early_init_f(void)
  25{
  26        /*
  27         * default gpio configuration
  28         * There are maximum 64 gpios controlled through 2 sets of registers
  29         * the  below configuration configures mainly initial LED status
  30         */
  31        mvebu_config_gpio(SBX81LIFXCAT_OE_VAL_LOW,
  32                          SBX81LIFXCAT_OE_VAL_HIGH,
  33                          SBX81LIFXCAT_OE_LOW, SBX81LIFXCAT_OE_HIGH);
  34
  35        /* Multi-Purpose Pins Functionality configuration */
  36        static const u32 kwmpp_config[] = {
  37                MPP0_SPI_SCn,
  38                MPP1_SPI_MOSI,
  39                MPP2_SPI_SCK,
  40                MPP3_SPI_MISO,
  41                MPP4_NF_IO6,
  42                MPP5_NF_IO7,
  43                MPP6_SYSRST_OUTn,
  44                MPP7_GPO,
  45                MPP8_TW_SDA,
  46                MPP9_TW_SCK,
  47                MPP10_UART0_TXD,
  48                MPP11_UART0_RXD,
  49                MPP12_GPO,
  50                MPP13_UART1_TXD,
  51                MPP14_UART1_RXD,
  52                MPP15_GPIO,
  53                MPP16_GPIO,
  54                MPP17_GPIO,
  55                MPP18_NF_IO0,
  56                MPP19_NF_IO1,
  57                MPP20_GE1_0,
  58                MPP21_GE1_1,
  59                MPP22_GE1_2,
  60                MPP23_GE1_3,
  61                MPP24_GE1_4,
  62                MPP25_GE1_5,
  63                MPP26_GE1_6,
  64                MPP27_GE1_7,
  65                MPP28_GE1_8,
  66                MPP29_GE1_9,
  67                MPP30_GE1_10,
  68                MPP31_GE1_11,
  69                MPP32_GE1_12,
  70                MPP33_GE1_13,
  71                MPP34_GPIO,
  72                MPP35_GPIO,
  73                MPP36_GPIO,
  74                MPP37_GPIO,
  75                MPP38_GPIO,
  76                MPP39_GPIO,
  77                MPP40_GPIO,
  78                MPP41_GPIO,
  79                MPP42_GPIO,
  80                MPP43_GPIO,
  81                MPP44_GPIO,
  82                MPP45_GPIO,
  83                MPP46_GPIO,
  84                MPP47_GPIO,
  85                MPP48_GPIO,
  86                MPP49_GPIO,
  87                0
  88        };
  89
  90        kirkwood_mpp_conf(kwmpp_config, NULL);
  91        return 0;
  92}
  93
  94int board_init(void)
  95{
  96        /* address of boot parameters */
  97        gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  98
  99        return 0;
 100}
 101
 102#ifdef CONFIG_RESET_PHY_R
 103/* automatically defined by kirkwood config.h */
 104void reset_phy(void)
 105{
 106}
 107#endif
 108
 109#ifdef CONFIG_MV88E61XX_SWITCH
 110int mv88e61xx_hw_reset(struct phy_device *phydev)
 111{
 112        phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
 113
 114        return 0;
 115}
 116#endif
 117
 118#ifdef CONFIG_MISC_INIT_R
 119int misc_init_r(void)
 120{
 121        struct udevice *dev;
 122        int ret;
 123
 124        ret = led_get_by_label("status:ledp", &dev);
 125        if (!ret)
 126                led_set_state(dev, LEDST_ON);
 127
 128        ret = led_get_by_label("status:ledn", &dev);
 129        if (!ret)
 130                led_set_state(dev, LEDST_OFF);
 131
 132        return 0;
 133}
 134#endif
 135