uboot/board/samsung/common/exynos5-dt.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2012 Samsung Electronics
   4 */
   5
   6#include <common.h>
   7#include <dm.h>
   8#include <dwc3-uboot.h>
   9#include <env.h>
  10#include <fdtdec.h>
  11#include <asm/io.h>
  12#include <errno.h>
  13#include <i2c.h>
  14#include <mmc.h>
  15#include <netdev.h>
  16#include <samsung-usb-phy-uboot.h>
  17#include <spi.h>
  18#include <usb.h>
  19#include <video_bridge.h>
  20#include <asm/gpio.h>
  21#include <asm/arch/cpu.h>
  22#include <asm/arch/dwmmc.h>
  23#include <asm/arch/mmc.h>
  24#include <asm/arch/pinmux.h>
  25#include <asm/arch/power.h>
  26#include <asm/arch/sromc.h>
  27#include <power/pmic.h>
  28#include <power/max77686_pmic.h>
  29#include <power/regulator.h>
  30#include <power/s2mps11.h>
  31#include <power/s5m8767.h>
  32#include <samsung/exynos5-dt-types.h>
  33#include <samsung/misc.h>
  34#include <tmu.h>
  35
  36DECLARE_GLOBAL_DATA_PTR;
  37
  38int exynos_init(void)
  39{
  40        return 0;
  41}
  42
  43static int exynos_set_regulator(const char *name, uint uv)
  44{
  45        struct udevice *dev;
  46        int ret;
  47
  48        ret = regulator_get_by_platname(name, &dev);
  49        if (ret) {
  50                debug("%s: Cannot find regulator %s\n", __func__, name);
  51                return ret;
  52        }
  53        ret = regulator_set_value(dev, uv);
  54        if (ret) {
  55                debug("%s: Cannot set regulator %s\n", __func__, name);
  56                return ret;
  57        }
  58
  59        return 0;
  60}
  61
  62int exynos_power_init(void)
  63{
  64        struct udevice *dev;
  65        int ret;
  66
  67#ifdef CONFIG_PMIC_S2MPS11
  68        ret = pmic_get("s2mps11_pmic", &dev);
  69#else
  70        ret = pmic_get("max77686", &dev);
  71        if (!ret) {
  72                /* TODO(sjg@chromium.org): Move into the clock/pmic API */
  73                ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
  74                                MAX77686_32KHCP_EN);
  75                if (ret)
  76                        return ret;
  77                ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
  78                                MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
  79                if (ret)
  80                        return ret;
  81        } else {
  82                ret = pmic_get("s5m8767-pmic", &dev);
  83                /* TODO(sjg@chromium.org): Use driver model to access clock */
  84#ifdef CONFIG_PMIC_S5M8767
  85                if (!ret)
  86                        s5m8767_enable_32khz_cp(dev);
  87#endif
  88        }
  89#endif  /* CONFIG_PMIC_S2MPS11 */
  90        if (ret == -ENODEV)
  91                return 0;
  92
  93        ret = regulators_enable_boot_on(false);
  94        if (ret)
  95                return ret;
  96
  97        ret = exynos_set_regulator("vdd_mif", 1100000);
  98        if (ret)
  99                return ret;
 100
 101        ret = exynos_set_regulator("vdd_arm", 1300000);
 102        if (ret)
 103                return ret;
 104        ret = exynos_set_regulator("vdd_int", 1012500);
 105        if (ret)
 106                return ret;
 107        ret = exynos_set_regulator("vdd_g3d", 1200000);
 108        if (ret)
 109                return ret;
 110
 111        return 0;
 112}
 113
 114int board_get_revision(void)
 115{
 116        return 0;
 117}
 118
 119#ifdef CONFIG_USB_DWC3
 120static struct dwc3_device dwc3_device_data = {
 121        .maximum_speed = USB_SPEED_SUPER,
 122        .base = 0x12400000,
 123        .dr_mode = USB_DR_MODE_PERIPHERAL,
 124        .index = 0,
 125};
 126
 127int usb_gadget_handle_interrupts(void)
 128{
 129        dwc3_uboot_handle_interrupt(0);
 130        return 0;
 131}
 132
 133int board_usb_init(int index, enum usb_init_type init)
 134{
 135        struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
 136                samsung_get_base_usb3_phy();
 137
 138        if (!phy) {
 139                pr_err("usb3 phy not supported\n");
 140                return -ENODEV;
 141        }
 142
 143        set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
 144        exynos5_usb3_phy_init(phy);
 145
 146        return dwc3_uboot_init(&dwc3_device_data);
 147}
 148#endif
 149#ifdef CONFIG_SET_DFU_ALT_INFO
 150char *get_dfu_alt_system(char *interface, char *devstr)
 151{
 152        char *info = "Not supported!";
 153
 154        if (board_is_odroidxu4() || board_is_odroidhc1() || board_is_odroidhc2())
 155                return info;
 156
 157        return env_get("dfu_alt_system");
 158}
 159
 160char *get_dfu_alt_boot(char *interface, char *devstr)
 161{
 162        char *info = "Not supported!";
 163        struct mmc *mmc;
 164        char *alt_boot;
 165        int dev_num;
 166
 167        if (board_is_odroidxu4() || board_is_odroidhc1() || board_is_odroidhc2())
 168                return info;
 169
 170        dev_num = simple_strtoul(devstr, NULL, 10);
 171
 172        mmc = find_mmc_device(dev_num);
 173        if (!mmc)
 174                return NULL;
 175
 176        if (mmc_init(mmc))
 177                return NULL;
 178
 179        if (IS_SD(mmc))
 180                alt_boot = CONFIG_DFU_ALT_BOOT_SD;
 181        else
 182                alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
 183
 184        return alt_boot;
 185}
 186#endif
 187