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12#include <common.h>
13#include <dm.h>
14#include <miiphy.h>
15#include <phy.h>
16
17#include <asm/types.h>
18#include <linux/list.h>
19#include <malloc.h>
20#include <net.h>
21
22
23#undef MII_DEBUG
24
25#undef debug
26#ifdef MII_DEBUG
27#define debug(fmt, args...) printf(fmt, ##args)
28#else
29#define debug(fmt, args...)
30#endif
31
32static struct list_head mii_devs;
33static struct mii_dev *current_mii;
34
35
36
37
38struct mii_dev *miiphy_get_dev_by_name(const char *devname)
39{
40 struct list_head *entry;
41 struct mii_dev *dev;
42
43 if (!devname) {
44 printf("NULL device name!\n");
45 return NULL;
46 }
47
48 list_for_each(entry, &mii_devs) {
49 dev = list_entry(entry, struct mii_dev, link);
50 if (strcmp(dev->name, devname) == 0)
51 return dev;
52 }
53
54 return NULL;
55}
56
57
58
59
60
61void miiphy_init(void)
62{
63 INIT_LIST_HEAD(&mii_devs);
64 current_mii = NULL;
65}
66
67struct mii_dev *mdio_alloc(void)
68{
69 struct mii_dev *bus;
70
71 bus = malloc(sizeof(*bus));
72 if (!bus)
73 return bus;
74
75 memset(bus, 0, sizeof(*bus));
76
77
78 INIT_LIST_HEAD(&bus->link);
79
80 return bus;
81}
82
83void mdio_free(struct mii_dev *bus)
84{
85 free(bus);
86}
87
88int mdio_register(struct mii_dev *bus)
89{
90 if (!bus || !bus->read || !bus->write)
91 return -1;
92
93
94 if (miiphy_get_dev_by_name(bus->name)) {
95 printf("mdio_register: non unique device name '%s'\n",
96 bus->name);
97 return -1;
98 }
99
100
101 list_add_tail(&bus->link, &mii_devs);
102
103 if (!current_mii)
104 current_mii = bus;
105
106 return 0;
107}
108
109int mdio_register_seq(struct mii_dev *bus, int seq)
110{
111 int ret;
112
113
114 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
115 if (ret < 0)
116 return ret;
117
118 return mdio_register(bus);
119}
120
121int mdio_unregister(struct mii_dev *bus)
122{
123 if (!bus)
124 return 0;
125
126
127 list_del(&bus->link);
128
129 if (current_mii == bus)
130 current_mii = NULL;
131
132 return 0;
133}
134
135void mdio_list_devices(void)
136{
137 struct list_head *entry;
138
139 list_for_each(entry, &mii_devs) {
140 int i;
141 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
142
143 printf("%s:\n", bus->name);
144
145 for (i = 0; i < PHY_MAX_ADDR; i++) {
146 struct phy_device *phydev = bus->phymap[i];
147
148 if (phydev) {
149 printf("%x - %s", i, phydev->drv->name);
150
151 if (phydev->dev)
152 printf(" <--> %s\n", phydev->dev->name);
153 else
154 printf("\n");
155 }
156 }
157 }
158}
159
160int miiphy_set_current_dev(const char *devname)
161{
162 struct mii_dev *dev;
163
164 dev = miiphy_get_dev_by_name(devname);
165 if (dev) {
166 current_mii = dev;
167 return 0;
168 }
169
170 printf("No such device: %s\n", devname);
171
172 return 1;
173}
174
175struct mii_dev *mdio_get_current_dev(void)
176{
177 return current_mii;
178}
179
180struct list_head *mdio_get_list_head(void)
181{
182 return &mii_devs;
183}
184
185struct phy_device *mdio_phydev_for_ethname(const char *ethname)
186{
187 struct list_head *entry;
188 struct mii_dev *bus;
189
190 list_for_each(entry, &mii_devs) {
191 int i;
192 bus = list_entry(entry, struct mii_dev, link);
193
194 for (i = 0; i < PHY_MAX_ADDR; i++) {
195 if (!bus->phymap[i] || !bus->phymap[i]->dev)
196 continue;
197
198 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
199 return bus->phymap[i];
200 }
201 }
202
203 printf("%s is not a known ethernet\n", ethname);
204 return NULL;
205}
206
207const char *miiphy_get_current_dev(void)
208{
209 if (current_mii)
210 return current_mii->name;
211
212 return NULL;
213}
214
215static struct mii_dev *miiphy_get_active_dev(const char *devname)
216{
217
218 if (current_mii)
219 if (strcmp(current_mii->name, devname) == 0)
220 return current_mii;
221
222
223 if (miiphy_set_current_dev(devname))
224 return NULL;
225 else
226 return current_mii;
227}
228
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236
237
238
239int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
240 unsigned short *value)
241{
242 struct mii_dev *bus;
243 int ret;
244
245 bus = miiphy_get_active_dev(devname);
246 if (!bus)
247 return 1;
248
249 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
250 if (ret < 0)
251 return 1;
252
253 *value = (unsigned short)ret;
254 return 0;
255}
256
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263
264
265
266
267int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
268 unsigned short value)
269{
270 struct mii_dev *bus;
271
272 bus = miiphy_get_active_dev(devname);
273 if (bus)
274 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
275
276 return 1;
277}
278
279
280
281
282
283void miiphy_listdev(void)
284{
285 struct list_head *entry;
286 struct mii_dev *dev;
287
288 puts("MII devices: ");
289 list_for_each(entry, &mii_devs) {
290 dev = list_entry(entry, struct mii_dev, link);
291 printf("'%s' ", dev->name);
292 }
293 puts("\n");
294
295 if (current_mii)
296 printf("Current device: '%s'\n", current_mii->name);
297}
298
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310
311
312int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
313 unsigned char *model, unsigned char *rev)
314{
315 unsigned int reg = 0;
316 unsigned short tmp;
317
318 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
319 debug("PHY ID register 2 read failed\n");
320 return -1;
321 }
322 reg = tmp;
323
324 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
325
326 if (reg == 0xFFFF) {
327
328 return -1;
329 }
330
331 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
332 debug("PHY ID register 1 read failed\n");
333 return -1;
334 }
335 reg |= tmp << 16;
336 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
337
338 *oui = (reg >> 10);
339 *model = (unsigned char)((reg >> 4) & 0x0000003F);
340 *rev = (unsigned char)(reg & 0x0000000F);
341 return 0;
342}
343
344#ifndef CONFIG_PHYLIB
345
346
347
348
349
350
351
352
353
354int miiphy_reset(const char *devname, unsigned char addr)
355{
356 unsigned short reg;
357 int timeout = 500;
358
359 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
360 debug("PHY status read failed\n");
361 return -1;
362 }
363 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
364 debug("PHY reset failed\n");
365 return -1;
366 }
367#ifdef CONFIG_PHY_RESET_DELAY
368 udelay(CONFIG_PHY_RESET_DELAY);
369#endif
370
371
372
373
374
375 reg = 0x8000;
376 while (((reg & 0x8000) != 0) && timeout--) {
377 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
378 debug("PHY status read failed\n");
379 return -1;
380 }
381 udelay(1000);
382 }
383 if ((reg & 0x8000) == 0) {
384 return 0;
385 } else {
386 puts("PHY reset timed out\n");
387 return -1;
388 }
389 return 0;
390}
391#endif
392
393
394
395
396
397int miiphy_speed(const char *devname, unsigned char addr)
398{
399 u16 bmcr, anlpar, adv;
400
401#if defined(CONFIG_PHY_GIGE)
402 u16 btsr;
403
404
405
406
407
408 if (miiphy_is_1000base_x(devname, addr))
409 return _1000BASET;
410
411
412
413
414
415 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
416 printf("PHY 1000BT status");
417 goto miiphy_read_failed;
418 }
419 if (btsr != 0xFFFF &&
420 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
421 return _1000BASET;
422#endif
423
424
425 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
426 printf("PHY speed");
427 goto miiphy_read_failed;
428 }
429
430 if (bmcr & BMCR_ANENABLE) {
431
432 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
433 printf("PHY AN speed");
434 goto miiphy_read_failed;
435 }
436
437 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
438 puts("PHY AN adv speed");
439 goto miiphy_read_failed;
440 }
441 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
442 }
443
444 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
445
446miiphy_read_failed:
447 printf(" read failed, assuming 10BASE-T\n");
448 return _10BASET;
449}
450
451
452
453
454
455int miiphy_duplex(const char *devname, unsigned char addr)
456{
457 u16 bmcr, anlpar, adv;
458
459#if defined(CONFIG_PHY_GIGE)
460 u16 btsr;
461
462
463 if (miiphy_is_1000base_x(devname, addr)) {
464
465 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
466 printf("1000BASE-X PHY AN duplex");
467 goto miiphy_read_failed;
468 }
469 }
470
471
472
473
474 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
475 printf("PHY 1000BT status");
476 goto miiphy_read_failed;
477 }
478 if (btsr != 0xFFFF) {
479 if (btsr & PHY_1000BTSR_1000FD) {
480 return FULL;
481 } else if (btsr & PHY_1000BTSR_1000HD) {
482 return HALF;
483 }
484 }
485#endif
486
487
488 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
489 puts("PHY duplex");
490 goto miiphy_read_failed;
491 }
492
493 if (bmcr & BMCR_ANENABLE) {
494
495 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
496 puts("PHY AN duplex");
497 goto miiphy_read_failed;
498 }
499
500 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
501 puts("PHY AN adv duplex");
502 goto miiphy_read_failed;
503 }
504 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
505 FULL : HALF;
506 }
507
508 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
509
510miiphy_read_failed:
511 printf(" read failed, assuming half duplex\n");
512 return HALF;
513}
514
515
516
517
518
519
520int miiphy_is_1000base_x(const char *devname, unsigned char addr)
521{
522#if defined(CONFIG_PHY_GIGE)
523 u16 exsr;
524
525 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
526 printf("PHY extended status read failed, assuming no "
527 "1000BASE-X\n");
528 return 0;
529 }
530 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
531#else
532 return 0;
533#endif
534}
535
536#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
537
538
539
540
541int miiphy_link(const char *devname, unsigned char addr)
542{
543 unsigned short reg;
544
545
546 (void)miiphy_read(devname, addr, MII_BMSR, ®);
547 if (miiphy_read(devname, addr, MII_BMSR, ®)) {
548 puts("MII_BMSR read failed, assuming no link\n");
549 return 0;
550 }
551
552
553 if ((reg & BMSR_LSTATUS) != 0) {
554 return 1;
555 } else {
556 return 0;
557 }
558}
559#endif
560