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8#include <common.h>
9#include <asm/io.h>
10#include <dm.h>
11#include <dm/lists.h>
12#include <dm/root.h>
13#include <dm/device-internal.h>
14#include <asm/arch/sci/sci.h>
15#include <linux/iopoll.h>
16#include <misc.h>
17
18DECLARE_GLOBAL_DATA_PTR;
19
20struct mu_type {
21 u32 tr[4];
22 u32 rr[4];
23 u32 sr;
24 u32 cr;
25};
26
27struct imx8_scu {
28 struct mu_type *base;
29};
30
31#define MU_CR_GIE_MASK 0xF0000000u
32#define MU_CR_RIE_MASK 0xF000000u
33#define MU_CR_GIR_MASK 0xF0000u
34#define MU_CR_TIE_MASK 0xF00000u
35#define MU_CR_F_MASK 0x7u
36#define MU_SR_TE0_MASK BIT(23)
37#define MU_SR_RF0_MASK BIT(27)
38#define MU_TR_COUNT 4
39#define MU_RR_COUNT 4
40
41static inline void mu_hal_init(struct mu_type *base)
42{
43
44 clrbits_le32(&base->cr, MU_CR_GIE_MASK | MU_CR_RIE_MASK |
45 MU_CR_TIE_MASK | MU_CR_GIR_MASK | MU_CR_F_MASK);
46}
47
48static int mu_hal_sendmsg(struct mu_type *base, u32 reg_index, u32 msg)
49{
50 u32 mask = MU_SR_TE0_MASK >> reg_index;
51 u32 val;
52 int ret;
53
54 assert(reg_index < MU_TR_COUNT);
55
56
57 ret = readl_poll_timeout(&base->sr, val, val & mask, 10000);
58 if (ret < 0) {
59 printf("%s timeout\n", __func__);
60 return -ETIMEDOUT;
61 }
62
63 writel(msg, &base->tr[reg_index]);
64
65 return 0;
66}
67
68static int mu_hal_receivemsg(struct mu_type *base, u32 reg_index, u32 *msg)
69{
70 u32 mask = MU_SR_RF0_MASK >> reg_index;
71 u32 val;
72 int ret;
73
74 assert(reg_index < MU_TR_COUNT);
75
76
77 ret = readl_poll_timeout(&base->sr, val, val & mask, 10000);
78 if (ret < 0) {
79 printf("%s timeout\n", __func__);
80 return -ETIMEDOUT;
81 }
82
83 *msg = readl(&base->rr[reg_index]);
84
85 return 0;
86}
87
88static int sc_ipc_read(struct mu_type *base, void *data)
89{
90 struct sc_rpc_msg_s *msg = (struct sc_rpc_msg_s *)data;
91 int ret;
92 u8 count = 0;
93
94 if (!msg)
95 return -EINVAL;
96
97
98 ret = mu_hal_receivemsg(base, 0, (u32 *)msg);
99 if (ret)
100 return ret;
101 count++;
102
103
104 if (msg->size > SC_RPC_MAX_MSG) {
105 *((u32 *)msg) = 0;
106 return -EINVAL;
107 }
108
109
110 while (count < msg->size) {
111 ret = mu_hal_receivemsg(base, count % MU_RR_COUNT,
112 &msg->DATA.u32[count - 1]);
113 if (ret)
114 return ret;
115 count++;
116 }
117
118 return 0;
119}
120
121static int sc_ipc_write(struct mu_type *base, void *data)
122{
123 struct sc_rpc_msg_s *msg = (struct sc_rpc_msg_s *)data;
124 int ret;
125 u8 count = 0;
126
127 if (!msg)
128 return -EINVAL;
129
130
131 if (msg->size > SC_RPC_MAX_MSG)
132 return -EINVAL;
133
134
135 ret = mu_hal_sendmsg(base, 0, *((u32 *)msg));
136 if (ret)
137 return ret;
138 count++;
139
140
141 while (count < msg->size) {
142 ret = mu_hal_sendmsg(base, count % MU_TR_COUNT,
143 msg->DATA.u32[count - 1]);
144 if (ret)
145 return ret;
146 count++;
147 }
148
149 return 0;
150}
151
152
153
154
155
156static int imx8_scu_call(struct udevice *dev, int no_resp, void *tx_msg,
157 int tx_size, void *rx_msg, int rx_size)
158{
159 struct imx8_scu *plat = dev_get_platdata(dev);
160 sc_err_t result;
161 int ret;
162
163
164 if (rx_msg && tx_msg != rx_msg)
165 printf("tx_msg %p, rx_msg %p\n", tx_msg, rx_msg);
166
167 ret = sc_ipc_write(plat->base, tx_msg);
168 if (ret)
169 return ret;
170 if (!no_resp) {
171 ret = sc_ipc_read(plat->base, rx_msg);
172 if (ret)
173 return ret;
174 }
175
176 result = RPC_R8((struct sc_rpc_msg_s *)tx_msg);
177
178 return sc_err_to_linux(result);
179}
180
181static int imx8_scu_probe(struct udevice *dev)
182{
183 struct imx8_scu *plat = dev_get_platdata(dev);
184 fdt_addr_t addr;
185
186 debug("%s(dev=%p) (plat=%p)\n", __func__, dev, plat);
187
188 addr = devfdt_get_addr(dev);
189 if (addr == FDT_ADDR_T_NONE)
190 return -EINVAL;
191
192#ifdef CONFIG_SPL_BUILD
193 plat->base = (struct mu_type *)CONFIG_MU_BASE_SPL;
194#else
195 plat->base = (struct mu_type *)addr;
196#endif
197
198
199 mu_hal_init(plat->base);
200
201 gd->arch.scu_dev = dev;
202
203 return 0;
204}
205
206static int imx8_scu_remove(struct udevice *dev)
207{
208 return 0;
209}
210
211static int imx8_scu_bind(struct udevice *dev)
212{
213 int ret;
214 struct udevice *child;
215 ofnode node;
216
217 debug("%s(dev=%p)\n", __func__, dev);
218 ofnode_for_each_subnode(node, dev_ofnode(dev)) {
219 ret = lists_bind_fdt(dev, node, &child, true);
220 if (ret)
221 return ret;
222 debug("bind child dev %s\n", child->name);
223 }
224
225 return 0;
226}
227
228static struct misc_ops imx8_scu_ops = {
229 .call = imx8_scu_call,
230};
231
232static const struct udevice_id imx8_scu_ids[] = {
233 { .compatible = "fsl,imx8qxp-mu" },
234 { .compatible = "fsl,imx8-mu" },
235 { }
236};
237
238U_BOOT_DRIVER(imx8_scu) = {
239 .name = "imx8_scu",
240 .id = UCLASS_MISC,
241 .of_match = imx8_scu_ids,
242 .probe = imx8_scu_probe,
243 .bind = imx8_scu_bind,
244 .remove = imx8_scu_remove,
245 .ops = &imx8_scu_ops,
246 .platdata_auto_alloc_size = sizeof(struct imx8_scu),
247 .flags = DM_FLAG_PRE_RELOC,
248};
249
