uboot/drivers/mtd/cfi_flash.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2002-2004
   4 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   5 *
   6 * Copyright (C) 2003 Arabella Software Ltd.
   7 * Yuli Barcohen <yuli@arabellasw.com>
   8 *
   9 * Copyright (C) 2004
  10 * Ed Okerson
  11 *
  12 * Copyright (C) 2006
  13 * Tolunay Orkun <listmember@orkun.us>
  14 */
  15
  16/* The DEBUG define must be before common to enable debugging */
  17/* #define DEBUG        */
  18
  19#include <common.h>
  20#include <console.h>
  21#include <dm.h>
  22#include <env.h>
  23#include <errno.h>
  24#include <fdt_support.h>
  25#include <irq_func.h>
  26#include <asm/processor.h>
  27#include <asm/io.h>
  28#include <asm/byteorder.h>
  29#include <asm/unaligned.h>
  30#include <env_internal.h>
  31#include <mtd/cfi_flash.h>
  32#include <watchdog.h>
  33
  34/*
  35 * This file implements a Common Flash Interface (CFI) driver for
  36 * U-Boot.
  37 *
  38 * The width of the port and the width of the chips are determined at
  39 * initialization.  These widths are used to calculate the address for
  40 * access CFI data structures.
  41 *
  42 * References
  43 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  44 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  45 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  46 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  47 * AMD CFI Specification, Release 2.0 December 1, 2001
  48 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  49 *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  50 *
  51 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  52 * reading and writing ... (yes there is such a Hardware).
  53 */
  54
  55DECLARE_GLOBAL_DATA_PTR;
  56
  57static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  58#ifdef CONFIG_FLASH_CFI_MTD
  59static uint flash_verbose = 1;
  60#else
  61#define flash_verbose 1
  62#endif
  63
  64flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  65
  66/*
  67 * Check if chip width is defined. If not, start detecting with 8bit.
  68 */
  69#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  70#define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  71#endif
  72
  73#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  74#define __maybe_weak __weak
  75#else
  76#define __maybe_weak static
  77#endif
  78
  79/*
  80 * 0xffff is an undefined value for the configuration register. When
  81 * this value is returned, the configuration register shall not be
  82 * written at all (default mode).
  83 */
  84static u16 cfi_flash_config_reg(int i)
  85{
  86#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  87        return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  88#else
  89        return 0xffff;
  90#endif
  91}
  92
  93#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  94int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  95#else
  96int cfi_flash_num_flash_banks;
  97#endif
  98
  99#ifdef CONFIG_CFI_FLASH /* for driver model */
 100static void cfi_flash_init_dm(void)
 101{
 102        struct udevice *dev;
 103
 104        cfi_flash_num_flash_banks = 0;
 105        /*
 106         * The uclass_first_device() will probe the first device and
 107         * uclass_next_device() will probe the rest if they exist. So
 108         * that cfi_flash_probe() will get called assigning the base
 109         * addresses that are available.
 110         */
 111        for (uclass_first_device(UCLASS_MTD, &dev);
 112             dev;
 113             uclass_next_device(&dev)) {
 114        }
 115}
 116
 117phys_addr_t cfi_flash_bank_addr(int i)
 118{
 119        return flash_info[i].base;
 120}
 121#else
 122__weak phys_addr_t cfi_flash_bank_addr(int i)
 123{
 124        return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 125}
 126#endif
 127
 128__weak unsigned long cfi_flash_bank_size(int i)
 129{
 130#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 131        return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 132#else
 133        return 0;
 134#endif
 135}
 136
 137__maybe_weak void flash_write8(u8 value, void *addr)
 138{
 139        __raw_writeb(value, addr);
 140}
 141
 142__maybe_weak void flash_write16(u16 value, void *addr)
 143{
 144        __raw_writew(value, addr);
 145}
 146
 147__maybe_weak void flash_write32(u32 value, void *addr)
 148{
 149        __raw_writel(value, addr);
 150}
 151
 152__maybe_weak void flash_write64(u64 value, void *addr)
 153{
 154        /* No architectures currently implement __raw_writeq() */
 155        *(volatile u64 *)addr = value;
 156}
 157
 158__maybe_weak u8 flash_read8(void *addr)
 159{
 160        return __raw_readb(addr);
 161}
 162
 163__maybe_weak u16 flash_read16(void *addr)
 164{
 165        return __raw_readw(addr);
 166}
 167
 168__maybe_weak u32 flash_read32(void *addr)
 169{
 170        return __raw_readl(addr);
 171}
 172
 173__maybe_weak u64 flash_read64(void *addr)
 174{
 175        /* No architectures currently implement __raw_readq() */
 176        return *(volatile u64 *)addr;
 177}
 178
 179/*-----------------------------------------------------------------------
 180 */
 181#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
 182        (defined(CONFIG_SYS_MONITOR_BASE) && \
 183        (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
 184static flash_info_t *flash_get_info(ulong base)
 185{
 186        int i;
 187        flash_info_t *info;
 188
 189        for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 190                info = &flash_info[i];
 191                if (info->size && info->start[0] <= base &&
 192                    base <= info->start[0] + info->size - 1)
 193                        return info;
 194        }
 195
 196        return NULL;
 197}
 198#endif
 199
 200unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 201{
 202        if (sect != (info->sector_count - 1))
 203                return info->start[sect + 1] - info->start[sect];
 204        else
 205                return info->start[0] + info->size - info->start[sect];
 206}
 207
 208/*-----------------------------------------------------------------------
 209 * create an address based on the offset and the port width
 210 */
 211static inline void *
 212flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 213{
 214        unsigned int byte_offset = offset * info->portwidth;
 215
 216        return (void *)(info->start[sect] + byte_offset);
 217}
 218
 219static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 220                               unsigned int offset, void *addr)
 221{
 222}
 223
 224/*-----------------------------------------------------------------------
 225 * make a proper sized command based on the port and chip widths
 226 */
 227static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 228{
 229        int i;
 230        int cword_offset;
 231        int cp_offset;
 232#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 233        u32 cmd_le = cpu_to_le32(cmd);
 234#endif
 235        uchar val;
 236        uchar *cp = (uchar *) cmdbuf;
 237
 238        for (i = info->portwidth; i > 0; i--) {
 239                cword_offset = (info->portwidth - i) % info->chipwidth;
 240#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 241                cp_offset = info->portwidth - i;
 242                val = *((uchar *)&cmd_le + cword_offset);
 243#else
 244                cp_offset = i - 1;
 245                val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 246#endif
 247                cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 248        }
 249}
 250
 251#ifdef DEBUG
 252/*-----------------------------------------------------------------------
 253 * Debug support
 254 */
 255static void print_longlong(char *str, unsigned long long data)
 256{
 257        int i;
 258        char *cp;
 259
 260        cp = (char *)&data;
 261        for (i = 0; i < 8; i++)
 262                sprintf(&str[i * 2], "%2.2x", *cp++);
 263}
 264
 265static void flash_printqry(struct cfi_qry *qry)
 266{
 267        u8 *p = (u8 *)qry;
 268        int x, y;
 269
 270        for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 271                debug("%02x : ", x);
 272                for (y = 0; y < 16; y++)
 273                        debug("%2.2x ", p[x + y]);
 274                debug(" ");
 275                for (y = 0; y < 16; y++) {
 276                        unsigned char c = p[x + y];
 277
 278                        if (c >= 0x20 && c <= 0x7e)
 279                                debug("%c", c);
 280                        else
 281                                debug(".");
 282                }
 283                debug("\n");
 284        }
 285}
 286#endif
 287
 288/*-----------------------------------------------------------------------
 289 * read a character at a port width address
 290 */
 291static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 292{
 293        uchar *cp;
 294        uchar retval;
 295
 296        cp = flash_map(info, 0, offset);
 297#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 298        retval = flash_read8(cp);
 299#else
 300        retval = flash_read8(cp + info->portwidth - 1);
 301#endif
 302        flash_unmap(info, 0, offset, cp);
 303        return retval;
 304}
 305
 306/*-----------------------------------------------------------------------
 307 * read a word at a port width address, assume 16bit bus
 308 */
 309static inline ushort flash_read_word(flash_info_t *info, uint offset)
 310{
 311        ushort *addr, retval;
 312
 313        addr = flash_map(info, 0, offset);
 314        retval = flash_read16(addr);
 315        flash_unmap(info, 0, offset, addr);
 316        return retval;
 317}
 318
 319/*-----------------------------------------------------------------------
 320 * read a long word by picking the least significant byte of each maximum
 321 * port size word. Swap for ppc format.
 322 */
 323static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 324                              uint offset)
 325{
 326        uchar *addr;
 327        ulong retval;
 328
 329#ifdef DEBUG
 330        int x;
 331#endif
 332        addr = flash_map(info, sect, offset);
 333
 334#ifdef DEBUG
 335        debug("long addr is at %p info->portwidth = %d\n", addr,
 336              info->portwidth);
 337        for (x = 0; x < 4 * info->portwidth; x++)
 338                debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 339#endif
 340#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 341        retval = ((flash_read8(addr) << 16) |
 342                  (flash_read8(addr + info->portwidth) << 24) |
 343                  (flash_read8(addr + 2 * info->portwidth)) |
 344                  (flash_read8(addr + 3 * info->portwidth) << 8));
 345#else
 346        retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 347                  (flash_read8(addr + info->portwidth - 1) << 16) |
 348                  (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 349                  (flash_read8(addr + 3 * info->portwidth - 1)));
 350#endif
 351        flash_unmap(info, sect, offset, addr);
 352
 353        return retval;
 354}
 355
 356/*
 357 * Write a proper sized command to the correct address
 358 */
 359static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 360                            uint offset, u32 cmd)
 361{
 362        void *addr;
 363        cfiword_t cword;
 364
 365        addr = flash_map(info, sect, offset);
 366        flash_make_cmd(info, cmd, &cword);
 367        switch (info->portwidth) {
 368        case FLASH_CFI_8BIT:
 369                debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 370                      cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 371                flash_write8(cword.w8, addr);
 372                break;
 373        case FLASH_CFI_16BIT:
 374                debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 375                      cmd, cword.w16,
 376                      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 377                flash_write16(cword.w16, addr);
 378                break;
 379        case FLASH_CFI_32BIT:
 380                debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 381                      cmd, cword.w32,
 382                      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 383                flash_write32(cword.w32, addr);
 384                break;
 385        case FLASH_CFI_64BIT:
 386#ifdef DEBUG
 387                {
 388                        char str[20];
 389
 390                        print_longlong(str, cword.w64);
 391
 392                        debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 393                              addr, cmd, str,
 394                              info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 395                }
 396#endif
 397                flash_write64(cword.w64, addr);
 398                break;
 399        }
 400
 401        /* Ensure all the instructions are fully finished */
 402        sync();
 403
 404        flash_unmap(info, sect, offset, addr);
 405}
 406
 407static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 408{
 409        flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 410        flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 411}
 412
 413/*-----------------------------------------------------------------------
 414 */
 415static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
 416                         uchar cmd)
 417{
 418        void *addr;
 419        cfiword_t cword;
 420        int retval;
 421
 422        addr = flash_map(info, sect, offset);
 423        flash_make_cmd(info, cmd, &cword);
 424
 425        debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 426        switch (info->portwidth) {
 427        case FLASH_CFI_8BIT:
 428                debug("is= %x %x\n", flash_read8(addr), cword.w8);
 429                retval = (flash_read8(addr) == cword.w8);
 430                break;
 431        case FLASH_CFI_16BIT:
 432                debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 433                retval = (flash_read16(addr) == cword.w16);
 434                break;
 435        case FLASH_CFI_32BIT:
 436                debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 437                retval = (flash_read32(addr) == cword.w32);
 438                break;
 439        case FLASH_CFI_64BIT:
 440#ifdef DEBUG
 441                {
 442                        char str1[20];
 443                        char str2[20];
 444
 445                        print_longlong(str1, flash_read64(addr));
 446                        print_longlong(str2, cword.w64);
 447                        debug("is= %s %s\n", str1, str2);
 448                }
 449#endif
 450                retval = (flash_read64(addr) == cword.w64);
 451                break;
 452        default:
 453                retval = 0;
 454                break;
 455        }
 456        flash_unmap(info, sect, offset, addr);
 457
 458        return retval;
 459}
 460
 461/*-----------------------------------------------------------------------
 462 */
 463static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
 464                       uchar cmd)
 465{
 466        void *addr;
 467        cfiword_t cword;
 468        int retval;
 469
 470        addr = flash_map(info, sect, offset);
 471        flash_make_cmd(info, cmd, &cword);
 472        switch (info->portwidth) {
 473        case FLASH_CFI_8BIT:
 474                retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 475                break;
 476        case FLASH_CFI_16BIT:
 477                retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 478                break;
 479        case FLASH_CFI_32BIT:
 480                retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 481                break;
 482        case FLASH_CFI_64BIT:
 483                retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 484                break;
 485        default:
 486                retval = 0;
 487                break;
 488        }
 489        flash_unmap(info, sect, offset, addr);
 490
 491        return retval;
 492}
 493
 494/*-----------------------------------------------------------------------
 495 */
 496static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
 497                        uchar cmd)
 498{
 499        u8 *addr;
 500        cfiword_t cword;
 501        int retval;
 502
 503        addr = flash_map(info, sect, offset);
 504        flash_make_cmd(info, cmd, &cword);
 505        switch (info->portwidth) {
 506        case FLASH_CFI_8BIT:
 507                retval = flash_read8(addr) != flash_read8(addr);
 508                break;
 509        case FLASH_CFI_16BIT:
 510                retval = flash_read16(addr) != flash_read16(addr);
 511                break;
 512        case FLASH_CFI_32BIT:
 513                retval = flash_read32(addr) != flash_read32(addr);
 514                break;
 515        case FLASH_CFI_64BIT:
 516                retval = ((flash_read32(addr) != flash_read32(addr)) ||
 517                           (flash_read32(addr + 4) != flash_read32(addr + 4)));
 518                break;
 519        default:
 520                retval = 0;
 521                break;
 522        }
 523        flash_unmap(info, sect, offset, addr);
 524
 525        return retval;
 526}
 527
 528/*
 529 * flash_is_busy - check to see if the flash is busy
 530 *
 531 * This routine checks the status of the chip and returns true if the
 532 * chip is busy.
 533 */
 534static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 535{
 536        int retval;
 537
 538        switch (info->vendor) {
 539        case CFI_CMDSET_INTEL_PROG_REGIONS:
 540        case CFI_CMDSET_INTEL_STANDARD:
 541        case CFI_CMDSET_INTEL_EXTENDED:
 542                retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 543                break;
 544        case CFI_CMDSET_AMD_STANDARD:
 545        case CFI_CMDSET_AMD_EXTENDED:
 546#ifdef CONFIG_FLASH_CFI_LEGACY
 547        case CFI_CMDSET_AMD_LEGACY:
 548#endif
 549                if (info->sr_supported) {
 550                        flash_write_cmd(info, sect, info->addr_unlock1,
 551                                        FLASH_CMD_READ_STATUS);
 552                        retval = !flash_isset(info, sect, 0,
 553                                              FLASH_STATUS_DONE);
 554                } else {
 555                        retval = flash_toggle(info, sect, 0,
 556                                              AMD_STATUS_TOGGLE);
 557                }
 558
 559                break;
 560        default:
 561                retval = 0;
 562        }
 563        debug("%s: %d\n", __func__, retval);
 564        return retval;
 565}
 566
 567/*-----------------------------------------------------------------------
 568 *  wait for XSR.7 to be set. Time out with an error if it does not.
 569 *  This routine does not set the flash to read-array mode.
 570 */
 571static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 572                              ulong tout, char *prompt)
 573{
 574        ulong start;
 575
 576#if CONFIG_SYS_HZ != 1000
 577        /* Avoid overflow for large HZ */
 578        if ((ulong)CONFIG_SYS_HZ > 100000)
 579                tout *= (ulong)CONFIG_SYS_HZ / 1000;
 580        else
 581                tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 582#endif
 583
 584        /* Wait for command completion */
 585#ifdef CONFIG_SYS_LOW_RES_TIMER
 586        reset_timer();
 587#endif
 588        start = get_timer(0);
 589        WATCHDOG_RESET();
 590        while (flash_is_busy(info, sector)) {
 591                if (get_timer(start) > tout) {
 592                        printf("Flash %s timeout at address %lx data %lx\n",
 593                               prompt, info->start[sector],
 594                               flash_read_long(info, sector, 0));
 595                        flash_write_cmd(info, sector, 0, info->cmd_reset);
 596                        udelay(1);
 597                        return ERR_TIMEOUT;
 598                }
 599                udelay(1);              /* also triggers watchdog */
 600        }
 601        return ERR_OK;
 602}
 603
 604/*-----------------------------------------------------------------------
 605 * Wait for XSR.7 to be set, if it times out print an error, otherwise
 606 * do a full status check.
 607 *
 608 * This routine sets the flash to read-array mode.
 609 */
 610static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 611                                   ulong tout, char *prompt)
 612{
 613        int retcode;
 614
 615        retcode = flash_status_check(info, sector, tout, prompt);
 616        switch (info->vendor) {
 617        case CFI_CMDSET_INTEL_PROG_REGIONS:
 618        case CFI_CMDSET_INTEL_EXTENDED:
 619        case CFI_CMDSET_INTEL_STANDARD:
 620                if (retcode == ERR_OK &&
 621                    !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 622                        retcode = ERR_INVAL;
 623                        printf("Flash %s error at address %lx\n", prompt,
 624                               info->start[sector]);
 625                        if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 626                                         FLASH_STATUS_PSLBS)) {
 627                                puts("Command Sequence Error.\n");
 628                        } else if (flash_isset(info, sector, 0,
 629                                                FLASH_STATUS_ECLBS)) {
 630                                puts("Block Erase Error.\n");
 631                                retcode = ERR_NOT_ERASED;
 632                        } else if (flash_isset(info, sector, 0,
 633                                                FLASH_STATUS_PSLBS)) {
 634                                puts("Locking Error\n");
 635                        }
 636                        if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 637                                puts("Block locked.\n");
 638                                retcode = ERR_PROTECTED;
 639                        }
 640                        if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 641                                puts("Vpp Low Error.\n");
 642                }
 643                flash_write_cmd(info, sector, 0, info->cmd_reset);
 644                udelay(1);
 645                break;
 646        default:
 647                break;
 648        }
 649        return retcode;
 650}
 651
 652static int use_flash_status_poll(flash_info_t *info)
 653{
 654#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 655        if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 656            info->vendor == CFI_CMDSET_AMD_STANDARD)
 657                return 1;
 658#endif
 659        return 0;
 660}
 661
 662static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 663                             ulong tout, char *prompt)
 664{
 665#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 666        ulong start;
 667        int ready;
 668
 669#if CONFIG_SYS_HZ != 1000
 670        /* Avoid overflow for large HZ */
 671        if ((ulong)CONFIG_SYS_HZ > 100000)
 672                tout *= (ulong)CONFIG_SYS_HZ / 1000;
 673        else
 674                tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 675#endif
 676
 677        /* Wait for command completion */
 678#ifdef CONFIG_SYS_LOW_RES_TIMER
 679        reset_timer();
 680#endif
 681        start = get_timer(0);
 682        WATCHDOG_RESET();
 683        while (1) {
 684                switch (info->portwidth) {
 685                case FLASH_CFI_8BIT:
 686                        ready = flash_read8(dst) == flash_read8(src);
 687                        break;
 688                case FLASH_CFI_16BIT:
 689                        ready = flash_read16(dst) == flash_read16(src);
 690                        break;
 691                case FLASH_CFI_32BIT:
 692                        ready = flash_read32(dst) == flash_read32(src);
 693                        break;
 694                case FLASH_CFI_64BIT:
 695                        ready = flash_read64(dst) == flash_read64(src);
 696                        break;
 697                default:
 698                        ready = 0;
 699                        break;
 700                }
 701                if (ready)
 702                        break;
 703                if (get_timer(start) > tout) {
 704                        printf("Flash %s timeout at address %lx data %lx\n",
 705                               prompt, (ulong)dst, (ulong)flash_read8(dst));
 706                        return ERR_TIMEOUT;
 707                }
 708                udelay(1);              /* also triggers watchdog */
 709        }
 710#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 711        return ERR_OK;
 712}
 713
 714/*-----------------------------------------------------------------------
 715 */
 716static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 717{
 718#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 719        unsigned short  w;
 720        unsigned int    l;
 721        unsigned long long ll;
 722#endif
 723
 724        switch (info->portwidth) {
 725        case FLASH_CFI_8BIT:
 726                cword->w8 = c;
 727                break;
 728        case FLASH_CFI_16BIT:
 729#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 730                w = c;
 731                w <<= 8;
 732                cword->w16 = (cword->w16 >> 8) | w;
 733#else
 734                cword->w16 = (cword->w16 << 8) | c;
 735#endif
 736                break;
 737        case FLASH_CFI_32BIT:
 738#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 739                l = c;
 740                l <<= 24;
 741                cword->w32 = (cword->w32 >> 8) | l;
 742#else
 743                cword->w32 = (cword->w32 << 8) | c;
 744#endif
 745                break;
 746        case FLASH_CFI_64BIT:
 747#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 748                ll = c;
 749                ll <<= 56;
 750                cword->w64 = (cword->w64 >> 8) | ll;
 751#else
 752                cword->w64 = (cword->w64 << 8) | c;
 753#endif
 754                break;
 755        }
 756}
 757
 758/*
 759 * Loop through the sector table starting from the previously found sector.
 760 * Searches forwards or backwards, dependent on the passed address.
 761 */
 762static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 763{
 764        static flash_sect_t saved_sector; /* previously found sector */
 765        static flash_info_t *saved_info; /* previously used flash bank */
 766        flash_sect_t sector = saved_sector;
 767
 768        if (info != saved_info || sector >= info->sector_count)
 769                sector = 0;
 770
 771        while ((sector < info->sector_count - 1) &&
 772               (info->start[sector] < addr))
 773                sector++;
 774        while ((info->start[sector] > addr) && (sector > 0))
 775                /*
 776                 * also decrements the sector in case of an overshot
 777                 * in the first loop
 778                 */
 779                sector--;
 780
 781        saved_sector = sector;
 782        saved_info = info;
 783        return sector;
 784}
 785
 786/*-----------------------------------------------------------------------
 787 */
 788static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 789{
 790        void *dstaddr = (void *)dest;
 791        int flag;
 792        flash_sect_t sect = 0;
 793        char sect_found = 0;
 794
 795        /* Check if Flash is (sufficiently) erased */
 796        switch (info->portwidth) {
 797        case FLASH_CFI_8BIT:
 798                flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 799                break;
 800        case FLASH_CFI_16BIT:
 801                flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 802                break;
 803        case FLASH_CFI_32BIT:
 804                flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 805                break;
 806        case FLASH_CFI_64BIT:
 807                flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 808                break;
 809        default:
 810                flag = 0;
 811                break;
 812        }
 813        if (!flag)
 814                return ERR_NOT_ERASED;
 815
 816        /* Disable interrupts which might cause a timeout here */
 817        flag = disable_interrupts();
 818
 819        switch (info->vendor) {
 820        case CFI_CMDSET_INTEL_PROG_REGIONS:
 821        case CFI_CMDSET_INTEL_EXTENDED:
 822        case CFI_CMDSET_INTEL_STANDARD:
 823                flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 824                flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 825                break;
 826        case CFI_CMDSET_AMD_EXTENDED:
 827        case CFI_CMDSET_AMD_STANDARD:
 828                sect = find_sector(info, dest);
 829                flash_unlock_seq(info, sect);
 830                flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 831                sect_found = 1;
 832                break;
 833#ifdef CONFIG_FLASH_CFI_LEGACY
 834        case CFI_CMDSET_AMD_LEGACY:
 835                sect = find_sector(info, dest);
 836                flash_unlock_seq(info, 0);
 837                flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 838                sect_found = 1;
 839                break;
 840#endif
 841        }
 842
 843        switch (info->portwidth) {
 844        case FLASH_CFI_8BIT:
 845                flash_write8(cword.w8, dstaddr);
 846                break;
 847        case FLASH_CFI_16BIT:
 848                flash_write16(cword.w16, dstaddr);
 849                break;
 850        case FLASH_CFI_32BIT:
 851                flash_write32(cword.w32, dstaddr);
 852                break;
 853        case FLASH_CFI_64BIT:
 854                flash_write64(cword.w64, dstaddr);
 855                break;
 856        }
 857
 858        /* re-enable interrupts if necessary */
 859        if (flag)
 860                enable_interrupts();
 861
 862        if (!sect_found)
 863                sect = find_sector(info, dest);
 864
 865        if (use_flash_status_poll(info))
 866                return flash_status_poll(info, &cword, dstaddr,
 867                                         info->write_tout, "write");
 868        else
 869                return flash_full_status_check(info, sect,
 870                                               info->write_tout, "write");
 871}
 872
 873#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 874
 875static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 876                                 int len)
 877{
 878        flash_sect_t sector;
 879        int cnt;
 880        int retcode;
 881        u8 *src = cp;
 882        u8 *dst = (u8 *)dest;
 883        u8 *dst2 = dst;
 884        int flag = 1;
 885        uint offset = 0;
 886        unsigned int shift;
 887        uchar write_cmd;
 888
 889        switch (info->portwidth) {
 890        case FLASH_CFI_8BIT:
 891                shift = 0;
 892                break;
 893        case FLASH_CFI_16BIT:
 894                shift = 1;
 895                break;
 896        case FLASH_CFI_32BIT:
 897                shift = 2;
 898                break;
 899        case FLASH_CFI_64BIT:
 900                shift = 3;
 901                break;
 902        default:
 903                retcode = ERR_INVAL;
 904                goto out_unmap;
 905        }
 906
 907        cnt = len >> shift;
 908
 909        while ((cnt-- > 0) && (flag == 1)) {
 910                switch (info->portwidth) {
 911                case FLASH_CFI_8BIT:
 912                        flag = ((flash_read8(dst2) & flash_read8(src)) ==
 913                                flash_read8(src));
 914                        src += 1, dst2 += 1;
 915                        break;
 916                case FLASH_CFI_16BIT:
 917                        flag = ((flash_read16(dst2) & flash_read16(src)) ==
 918                                flash_read16(src));
 919                        src += 2, dst2 += 2;
 920                        break;
 921                case FLASH_CFI_32BIT:
 922                        flag = ((flash_read32(dst2) & flash_read32(src)) ==
 923                                flash_read32(src));
 924                        src += 4, dst2 += 4;
 925                        break;
 926                case FLASH_CFI_64BIT:
 927                        flag = ((flash_read64(dst2) & flash_read64(src)) ==
 928                                flash_read64(src));
 929                        src += 8, dst2 += 8;
 930                        break;
 931                }
 932        }
 933        if (!flag) {
 934                retcode = ERR_NOT_ERASED;
 935                goto out_unmap;
 936        }
 937
 938        src = cp;
 939        sector = find_sector(info, dest);
 940
 941        switch (info->vendor) {
 942        case CFI_CMDSET_INTEL_PROG_REGIONS:
 943        case CFI_CMDSET_INTEL_STANDARD:
 944        case CFI_CMDSET_INTEL_EXTENDED:
 945                write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 946                            FLASH_CMD_WRITE_BUFFER_PROG :
 947                            FLASH_CMD_WRITE_TO_BUFFER;
 948                flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 949                flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 950                flash_write_cmd(info, sector, 0, write_cmd);
 951                retcode = flash_status_check(info, sector,
 952                                             info->buffer_write_tout,
 953                                             "write to buffer");
 954                if (retcode == ERR_OK) {
 955                        /* reduce the number of loops by the width of
 956                         * the port
 957                         */
 958                        cnt = len >> shift;
 959                        flash_write_cmd(info, sector, 0, cnt - 1);
 960                        while (cnt-- > 0) {
 961                                switch (info->portwidth) {
 962                                case FLASH_CFI_8BIT:
 963                                        flash_write8(flash_read8(src), dst);
 964                                        src += 1, dst += 1;
 965                                        break;
 966                                case FLASH_CFI_16BIT:
 967                                        flash_write16(flash_read16(src), dst);
 968                                        src += 2, dst += 2;
 969                                        break;
 970                                case FLASH_CFI_32BIT:
 971                                        flash_write32(flash_read32(src), dst);
 972                                        src += 4, dst += 4;
 973                                        break;
 974                                case FLASH_CFI_64BIT:
 975                                        flash_write64(flash_read64(src), dst);
 976                                        src += 8, dst += 8;
 977                                        break;
 978                                default:
 979                                        retcode = ERR_INVAL;
 980                                        goto out_unmap;
 981                                }
 982                        }
 983                        flash_write_cmd(info, sector, 0,
 984                                        FLASH_CMD_WRITE_BUFFER_CONFIRM);
 985                        retcode = flash_full_status_check(
 986                                info, sector, info->buffer_write_tout,
 987                                "buffer write");
 988                }
 989
 990                break;
 991
 992        case CFI_CMDSET_AMD_STANDARD:
 993        case CFI_CMDSET_AMD_EXTENDED:
 994                flash_unlock_seq(info, sector);
 995
 996#ifdef CONFIG_FLASH_SPANSION_S29WS_N
 997                offset = ((unsigned long)dst - info->start[sector]) >> shift;
 998#endif
 999                flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1000                cnt = len >> shift;
1001                flash_write_cmd(info, sector, offset, cnt - 1);
1002
1003                switch (info->portwidth) {
1004                case FLASH_CFI_8BIT:
1005                        while (cnt-- > 0) {
1006                                flash_write8(flash_read8(src), dst);
1007                                src += 1, dst += 1;
1008                        }
1009                        break;
1010                case FLASH_CFI_16BIT:
1011                        while (cnt-- > 0) {
1012                                flash_write16(flash_read16(src), dst);
1013                                src += 2, dst += 2;
1014                        }
1015                        break;
1016                case FLASH_CFI_32BIT:
1017                        while (cnt-- > 0) {
1018                                flash_write32(flash_read32(src), dst);
1019                                src += 4, dst += 4;
1020                        }
1021                        break;
1022                case FLASH_CFI_64BIT:
1023                        while (cnt-- > 0) {
1024                                flash_write64(flash_read64(src), dst);
1025                                src += 8, dst += 8;
1026                        }
1027                        break;
1028                default:
1029                        retcode = ERR_INVAL;
1030                        goto out_unmap;
1031                }
1032
1033                flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1034                if (use_flash_status_poll(info))
1035                        retcode = flash_status_poll(info, src - (1 << shift),
1036                                                    dst - (1 << shift),
1037                                                    info->buffer_write_tout,
1038                                                    "buffer write");
1039                else
1040                        retcode = flash_full_status_check(info, sector,
1041                                                          info->buffer_write_tout,
1042                                                          "buffer write");
1043                break;
1044
1045        default:
1046                debug("Unknown Command Set\n");
1047                retcode = ERR_INVAL;
1048                break;
1049        }
1050
1051out_unmap:
1052        return retcode;
1053}
1054#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1055
1056/*-----------------------------------------------------------------------
1057 */
1058int flash_erase(flash_info_t *info, int s_first, int s_last)
1059{
1060        int rcode = 0;
1061        int prot;
1062        flash_sect_t sect;
1063        int st;
1064
1065        if (info->flash_id != FLASH_MAN_CFI) {
1066                puts("Can't erase unknown flash type - aborted\n");
1067                return 1;
1068        }
1069        if (s_first < 0 || s_first > s_last) {
1070                puts("- no sectors to erase\n");
1071                return 1;
1072        }
1073
1074        prot = 0;
1075        for (sect = s_first; sect <= s_last; ++sect)
1076                if (info->protect[sect])
1077                        prot++;
1078        if (prot) {
1079                printf("- Warning: %d protected sectors will not be erased!\n",
1080                       prot);
1081        } else if (flash_verbose) {
1082                putc('\n');
1083        }
1084
1085        for (sect = s_first; sect <= s_last; sect++) {
1086                if (ctrlc()) {
1087                        printf("\n");
1088                        return 1;
1089                }
1090
1091                if (info->protect[sect] == 0) { /* not protected */
1092#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1093                        int k;
1094                        int size;
1095                        int erased;
1096                        u32 *flash;
1097
1098                        /*
1099                         * Check if whole sector is erased
1100                         */
1101                        size = flash_sector_size(info, sect);
1102                        erased = 1;
1103                        flash = (u32 *)info->start[sect];
1104                        /* divide by 4 for longword access */
1105                        size = size >> 2;
1106                        for (k = 0; k < size; k++) {
1107                                if (flash_read32(flash++) != 0xffffffff) {
1108                                        erased = 0;
1109                                        break;
1110                                }
1111                        }
1112                        if (erased) {
1113                                if (flash_verbose)
1114                                        putc(',');
1115                                continue;
1116                        }
1117#endif
1118                        switch (info->vendor) {
1119                        case CFI_CMDSET_INTEL_PROG_REGIONS:
1120                        case CFI_CMDSET_INTEL_STANDARD:
1121                        case CFI_CMDSET_INTEL_EXTENDED:
1122                                flash_write_cmd(info, sect, 0,
1123                                                FLASH_CMD_CLEAR_STATUS);
1124                                flash_write_cmd(info, sect, 0,
1125                                                FLASH_CMD_BLOCK_ERASE);
1126                                flash_write_cmd(info, sect, 0,
1127                                                FLASH_CMD_ERASE_CONFIRM);
1128                                break;
1129                        case CFI_CMDSET_AMD_STANDARD:
1130                        case CFI_CMDSET_AMD_EXTENDED:
1131                                flash_unlock_seq(info, sect);
1132                                flash_write_cmd(info, sect,
1133                                                info->addr_unlock1,
1134                                                AMD_CMD_ERASE_START);
1135                                flash_unlock_seq(info, sect);
1136                                flash_write_cmd(info, sect, 0,
1137                                                info->cmd_erase_sector);
1138                                break;
1139#ifdef CONFIG_FLASH_CFI_LEGACY
1140                        case CFI_CMDSET_AMD_LEGACY:
1141                                flash_unlock_seq(info, 0);
1142                                flash_write_cmd(info, 0, info->addr_unlock1,
1143                                                AMD_CMD_ERASE_START);
1144                                flash_unlock_seq(info, 0);
1145                                flash_write_cmd(info, sect, 0,
1146                                                AMD_CMD_ERASE_SECTOR);
1147                                break;
1148#endif
1149                        default:
1150                                debug("Unknown flash vendor %d\n",
1151                                      info->vendor);
1152                                break;
1153                        }
1154
1155                        if (use_flash_status_poll(info)) {
1156                                cfiword_t cword;
1157                                void *dest;
1158
1159                                cword.w64 = 0xffffffffffffffffULL;
1160                                dest = flash_map(info, sect, 0);
1161                                st = flash_status_poll(info, &cword, dest,
1162                                                       info->erase_blk_tout,
1163                                                       "erase");
1164                                flash_unmap(info, sect, 0, dest);
1165                        } else {
1166                                st = flash_full_status_check(info, sect,
1167                                                             info->erase_blk_tout,
1168                                                             "erase");
1169                        }
1170
1171                        if (st)
1172                                rcode = 1;
1173                        else if (flash_verbose)
1174                                putc('.');
1175                }
1176        }
1177
1178        if (flash_verbose)
1179                puts(" done\n");
1180
1181        return rcode;
1182}
1183
1184#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1185static int sector_erased(flash_info_t *info, int i)
1186{
1187        int k;
1188        int size;
1189        u32 *flash;
1190
1191        /*
1192         * Check if whole sector is erased
1193         */
1194        size = flash_sector_size(info, i);
1195        flash = (u32 *)info->start[i];
1196        /* divide by 4 for longword access */
1197        size = size >> 2;
1198
1199        for (k = 0; k < size; k++) {
1200                if (flash_read32(flash++) != 0xffffffff)
1201                        return 0;       /* not erased */
1202        }
1203
1204        return 1;                       /* erased */
1205}
1206#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1207
1208void flash_print_info(flash_info_t *info)
1209{
1210        int i;
1211
1212        if (info->flash_id != FLASH_MAN_CFI) {
1213                puts("missing or unknown FLASH type\n");
1214                return;
1215        }
1216
1217        printf("%s flash (%d x %d)",
1218               info->name,
1219               (info->portwidth << 3), (info->chipwidth << 3));
1220        if (info->size < 1024 * 1024)
1221                printf("  Size: %ld kB in %d Sectors\n",
1222                       info->size >> 10, info->sector_count);
1223        else
1224                printf("  Size: %ld MB in %d Sectors\n",
1225                       info->size >> 20, info->sector_count);
1226        printf("  ");
1227        switch (info->vendor) {
1228        case CFI_CMDSET_INTEL_PROG_REGIONS:
1229                printf("Intel Prog Regions");
1230                break;
1231        case CFI_CMDSET_INTEL_STANDARD:
1232                printf("Intel Standard");
1233                break;
1234        case CFI_CMDSET_INTEL_EXTENDED:
1235                printf("Intel Extended");
1236                break;
1237        case CFI_CMDSET_AMD_STANDARD:
1238                printf("AMD Standard");
1239                break;
1240        case CFI_CMDSET_AMD_EXTENDED:
1241                printf("AMD Extended");
1242                break;
1243#ifdef CONFIG_FLASH_CFI_LEGACY
1244        case CFI_CMDSET_AMD_LEGACY:
1245                printf("AMD Legacy");
1246                break;
1247#endif
1248        default:
1249                printf("Unknown (%d)", info->vendor);
1250                break;
1251        }
1252        printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1253               info->manufacturer_id);
1254        printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1255               info->device_id);
1256        if ((info->device_id & 0xff) == 0x7E) {
1257                printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1258                       info->device_id2);
1259        }
1260        if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1261                printf("\n  Advanced Sector Protection (PPB) enabled");
1262        printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1263               info->erase_blk_tout, info->write_tout);
1264        if (info->buffer_size > 1) {
1265                printf("  Buffer write timeout: %ld ms, ",
1266                       info->buffer_write_tout);
1267                printf("buffer size: %d bytes\n", info->buffer_size);
1268        }
1269
1270        puts("\n  Sector Start Addresses:");
1271        for (i = 0; i < info->sector_count; ++i) {
1272                if (ctrlc())
1273                        break;
1274                if ((i % 5) == 0)
1275                        putc('\n');
1276#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1277                /* print empty and read-only info */
1278                printf("  %08lX %c %s ",
1279                       info->start[i],
1280                       sector_erased(info, i) ? 'E' : ' ',
1281                       info->protect[i] ? "RO" : "  ");
1282#else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1283                printf("  %08lX   %s ",
1284                       info->start[i],
1285                       info->protect[i] ? "RO" : "  ");
1286#endif
1287        }
1288        putc('\n');
1289}
1290
1291/*-----------------------------------------------------------------------
1292 * This is used in a few places in write_buf() to show programming
1293 * progress.  Making it a function is nasty because it needs to do side
1294 * effect updates to digit and dots.  Repeated code is nasty too, so
1295 * we define it once here.
1296 */
1297#ifdef CONFIG_FLASH_SHOW_PROGRESS
1298#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1299        if (flash_verbose) { \
1300                dots -= dots_sub; \
1301                if (scale > 0 && dots <= 0) { \
1302                        if ((digit % 5) == 0) \
1303                                printf("%d", digit / 5); \
1304                        else \
1305                                putc('.'); \
1306                        digit--; \
1307                        dots += scale; \
1308                } \
1309        }
1310#else
1311#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1312#endif
1313
1314/*-----------------------------------------------------------------------
1315 * Copy memory to flash, returns:
1316 * 0 - OK
1317 * 1 - write timeout
1318 * 2 - Flash not erased
1319 */
1320int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1321{
1322        ulong wp;
1323        uchar *p;
1324        int aln;
1325        cfiword_t cword;
1326        int i, rc;
1327#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1328        int buffered_size;
1329#endif
1330#ifdef CONFIG_FLASH_SHOW_PROGRESS
1331        int digit = CONFIG_FLASH_SHOW_PROGRESS;
1332        int scale = 0;
1333        int dots  = 0;
1334
1335        /*
1336         * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1337         */
1338        if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1339                scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1340                        CONFIG_FLASH_SHOW_PROGRESS);
1341        }
1342#endif
1343
1344        /* get lower aligned address */
1345        wp = (addr & ~(info->portwidth - 1));
1346
1347        /* handle unaligned start */
1348        aln = addr - wp;
1349        if (aln != 0) {
1350                cword.w32 = 0;
1351                p = (uchar *)wp;
1352                for (i = 0; i < aln; ++i)
1353                        flash_add_byte(info, &cword, flash_read8(p + i));
1354
1355                for (; (i < info->portwidth) && (cnt > 0); i++) {
1356                        flash_add_byte(info, &cword, *src++);
1357                        cnt--;
1358                }
1359                for (; (cnt == 0) && (i < info->portwidth); ++i)
1360                        flash_add_byte(info, &cword, flash_read8(p + i));
1361
1362                rc = flash_write_cfiword(info, wp, cword);
1363                if (rc != 0)
1364                        return rc;
1365
1366                wp += i;
1367                FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1368        }
1369
1370        /* handle the aligned part */
1371#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1372        buffered_size = (info->portwidth / info->chipwidth);
1373        buffered_size *= info->buffer_size;
1374        while (cnt >= info->portwidth) {
1375                /* prohibit buffer write when buffer_size is 1 */
1376                if (info->buffer_size == 1) {
1377                        cword.w32 = 0;
1378                        for (i = 0; i < info->portwidth; i++)
1379                                flash_add_byte(info, &cword, *src++);
1380                        rc = flash_write_cfiword(info, wp, cword);
1381                        if (rc != 0)
1382                                return rc;
1383                        wp += info->portwidth;
1384                        cnt -= info->portwidth;
1385                        continue;
1386                }
1387
1388                /* write buffer until next buffered_size aligned boundary */
1389                i = buffered_size - (wp % buffered_size);
1390                if (i > cnt)
1391                        i = cnt;
1392                rc = flash_write_cfibuffer(info, wp, src, i);
1393                if (rc != ERR_OK)
1394                        return rc;
1395                i -= i & (info->portwidth - 1);
1396                wp += i;
1397                src += i;
1398                cnt -= i;
1399                FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1400                /* Only check every once in a while */
1401                if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1402                        return ERR_ABORTED;
1403        }
1404#else
1405        while (cnt >= info->portwidth) {
1406                cword.w32 = 0;
1407                for (i = 0; i < info->portwidth; i++)
1408                        flash_add_byte(info, &cword, *src++);
1409                rc = flash_write_cfiword(info, wp, cword);
1410                if (rc != 0)
1411                        return rc;
1412                wp += info->portwidth;
1413                cnt -= info->portwidth;
1414                FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1415                /* Only check every once in a while */
1416                if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1417                        return ERR_ABORTED;
1418        }
1419#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1420
1421        if (cnt == 0)
1422                return (0);
1423
1424        /*
1425         * handle unaligned tail bytes
1426         */
1427        cword.w32 = 0;
1428        p = (uchar *)wp;
1429        for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1430                flash_add_byte(info, &cword, *src++);
1431                --cnt;
1432        }
1433        for (; i < info->portwidth; ++i)
1434                flash_add_byte(info, &cword, flash_read8(p + i));
1435
1436        return flash_write_cfiword(info, wp, cword);
1437}
1438
1439static inline int manufact_match(flash_info_t *info, u32 manu)
1440{
1441        return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1442}
1443
1444/*-----------------------------------------------------------------------
1445 */
1446#ifdef CONFIG_SYS_FLASH_PROTECTION
1447
1448static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1449{
1450        if (manufact_match(info, INTEL_MANUFACT) &&
1451            info->device_id == NUMONYX_256MBIT) {
1452                /*
1453                 * see errata called
1454                 * "Numonyx Axcell P33/P30 Specification Update" :)
1455                 */
1456                flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1457                if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1458                                   prot)) {
1459                        /*
1460                         * cmd must come before FLASH_CMD_PROTECT + 20us
1461                         * Disable interrupts which might cause a timeout here.
1462                         */
1463                        int flag = disable_interrupts();
1464                        unsigned short cmd;
1465
1466                        if (prot)
1467                                cmd = FLASH_CMD_PROTECT_SET;
1468                        else
1469                                cmd = FLASH_CMD_PROTECT_CLEAR;
1470
1471                        flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1472                        flash_write_cmd(info, sector, 0, cmd);
1473                        /* re-enable interrupts if necessary */
1474                        if (flag)
1475                                enable_interrupts();
1476                }
1477                return 1;
1478        }
1479        return 0;
1480}
1481
1482int flash_real_protect(flash_info_t *info, long sector, int prot)
1483{
1484        int retcode = 0;
1485
1486        switch (info->vendor) {
1487        case CFI_CMDSET_INTEL_PROG_REGIONS:
1488        case CFI_CMDSET_INTEL_STANDARD:
1489        case CFI_CMDSET_INTEL_EXTENDED:
1490                if (!cfi_protect_bugfix(info, sector, prot)) {
1491                        flash_write_cmd(info, sector, 0,
1492                                        FLASH_CMD_CLEAR_STATUS);
1493                        flash_write_cmd(info, sector, 0,
1494                                        FLASH_CMD_PROTECT);
1495                        if (prot)
1496                                flash_write_cmd(info, sector, 0,
1497                                                FLASH_CMD_PROTECT_SET);
1498                        else
1499                                flash_write_cmd(info, sector, 0,
1500                                                FLASH_CMD_PROTECT_CLEAR);
1501                }
1502                break;
1503        case CFI_CMDSET_AMD_EXTENDED:
1504        case CFI_CMDSET_AMD_STANDARD:
1505                /* U-Boot only checks the first byte */
1506                if (manufact_match(info, ATM_MANUFACT)) {
1507                        if (prot) {
1508                                flash_unlock_seq(info, 0);
1509                                flash_write_cmd(info, 0,
1510                                                info->addr_unlock1,
1511                                                ATM_CMD_SOFTLOCK_START);
1512                                flash_unlock_seq(info, 0);
1513                                flash_write_cmd(info, sector, 0,
1514                                                ATM_CMD_LOCK_SECT);
1515                        } else {
1516                                flash_write_cmd(info, 0,
1517                                                info->addr_unlock1,
1518                                                AMD_CMD_UNLOCK_START);
1519                                if (info->device_id == ATM_ID_BV6416)
1520                                        flash_write_cmd(info, sector,
1521                                                        0, ATM_CMD_UNLOCK_SECT);
1522                        }
1523                }
1524                if (info->legacy_unlock) {
1525                        int flag = disable_interrupts();
1526                        int lock_flag;
1527
1528                        flash_unlock_seq(info, 0);
1529                        flash_write_cmd(info, 0, info->addr_unlock1,
1530                                        AMD_CMD_SET_PPB_ENTRY);
1531                        lock_flag = flash_isset(info, sector, 0, 0x01);
1532                        if (prot) {
1533                                if (lock_flag) {
1534                                        flash_write_cmd(info, sector, 0,
1535                                                        AMD_CMD_PPB_LOCK_BC1);
1536                                        flash_write_cmd(info, sector, 0,
1537                                                        AMD_CMD_PPB_LOCK_BC2);
1538                                }
1539                                debug("sector %ld %slocked\n", sector,
1540                                      lock_flag ? "" : "already ");
1541                        } else {
1542                                if (!lock_flag) {
1543                                        debug("unlock %ld\n", sector);
1544                                        flash_write_cmd(info, 0, 0,
1545                                                        AMD_CMD_PPB_UNLOCK_BC1);
1546                                        flash_write_cmd(info, 0, 0,
1547                                                        AMD_CMD_PPB_UNLOCK_BC2);
1548                                }
1549                                debug("sector %ld %sunlocked\n", sector,
1550                                      !lock_flag ? "" : "already ");
1551                        }
1552                        if (flag)
1553                                enable_interrupts();
1554
1555                        if (flash_status_check(info, sector,
1556                                               info->erase_blk_tout,
1557                                               prot ? "protect" : "unprotect"))
1558                                printf("status check error\n");
1559
1560                        flash_write_cmd(info, 0, 0,
1561                                        AMD_CMD_SET_PPB_EXIT_BC1);
1562                        flash_write_cmd(info, 0, 0,
1563                                        AMD_CMD_SET_PPB_EXIT_BC2);
1564                }
1565                break;
1566#ifdef CONFIG_FLASH_CFI_LEGACY
1567        case CFI_CMDSET_AMD_LEGACY:
1568                flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1569                flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1570                if (prot)
1571                        flash_write_cmd(info, sector, 0,
1572                                        FLASH_CMD_PROTECT_SET);
1573                else
1574                        flash_write_cmd(info, sector, 0,
1575                                        FLASH_CMD_PROTECT_CLEAR);
1576#endif
1577        };
1578
1579        /*
1580         * Flash needs to be in status register read mode for
1581         * flash_full_status_check() to work correctly
1582         */
1583        flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1584        retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1585                                          prot ? "protect" : "unprotect");
1586        if (retcode == 0) {
1587                info->protect[sector] = prot;
1588
1589                /*
1590                 * On some of Intel's flash chips (marked via legacy_unlock)
1591                 * unprotect unprotects all locking.
1592                 */
1593                if (prot == 0 && info->legacy_unlock) {
1594                        flash_sect_t i;
1595
1596                        for (i = 0; i < info->sector_count; i++) {
1597                                if (info->protect[i])
1598                                        flash_real_protect(info, i, 1);
1599                        }
1600                }
1601        }
1602        return retcode;
1603}
1604
1605/*-----------------------------------------------------------------------
1606 * flash_read_user_serial - read the OneTimeProgramming cells
1607 */
1608void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1609                            int len)
1610{
1611        uchar *src;
1612        uchar *dst;
1613
1614        dst = buffer;
1615        src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1616        flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1617        memcpy(dst, src + offset, len);
1618        flash_write_cmd(info, 0, 0, info->cmd_reset);
1619        udelay(1);
1620        flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1621}
1622
1623/*
1624 * flash_read_factory_serial - read the device Id from the protection area
1625 */
1626void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1627                               int len)
1628{
1629        uchar *src;
1630
1631        src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1632        flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1633        memcpy(buffer, src + offset, len);
1634        flash_write_cmd(info, 0, 0, info->cmd_reset);
1635        udelay(1);
1636        flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1637}
1638
1639#endif /* CONFIG_SYS_FLASH_PROTECTION */
1640
1641/*-----------------------------------------------------------------------
1642 * Reverse the order of the erase regions in the CFI QRY structure.
1643 * This is needed for chips that are either a) correctly detected as
1644 * top-boot, or b) buggy.
1645 */
1646static void cfi_reverse_geometry(struct cfi_qry *qry)
1647{
1648        unsigned int i, j;
1649        u32 tmp;
1650
1651        for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1652                tmp = get_unaligned(&qry->erase_region_info[i]);
1653                put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1654                              &qry->erase_region_info[i]);
1655                put_unaligned(tmp, &qry->erase_region_info[j]);
1656        }
1657}
1658
1659/*-----------------------------------------------------------------------
1660 * read jedec ids from device and set corresponding fields in info struct
1661 *
1662 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1663 *
1664 */
1665static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1666{
1667        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1668        udelay(1);
1669        flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1670        udelay(1000); /* some flash are slow to respond */
1671        info->manufacturer_id = flash_read_uchar(info,
1672                                                 FLASH_OFFSET_MANUFACTURER_ID);
1673        info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1674                        flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1675                        flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1676        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1677}
1678
1679static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1680{
1681        info->cmd_reset = FLASH_CMD_RESET;
1682
1683        cmdset_intel_read_jedec_ids(info);
1684        flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1685
1686#ifdef CONFIG_SYS_FLASH_PROTECTION
1687        /* read legacy lock/unlock bit from intel flash */
1688        if (info->ext_addr) {
1689                info->legacy_unlock =
1690                        flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1691        }
1692#endif
1693
1694        return 0;
1695}
1696
1697static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1698{
1699        ushort bank_id = 0;
1700        uchar  manu_id;
1701        uchar  feature;
1702
1703        flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1704        flash_unlock_seq(info, 0);
1705        flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1706        udelay(1000); /* some flash are slow to respond */
1707
1708        manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1709        /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1710        while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1711                bank_id += 0x100;
1712                manu_id = flash_read_uchar(info,
1713                                           bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1714        }
1715        info->manufacturer_id = manu_id;
1716
1717        debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1718              info->ext_addr, info->cfi_version);
1719        if (info->ext_addr && info->cfi_version >= 0x3134) {
1720                /* read software feature (at 0x53) */
1721                feature = flash_read_uchar(info, info->ext_addr + 0x13);
1722                debug("feature = 0x%x\n", feature);
1723                info->sr_supported = feature & 0x1;
1724        }
1725
1726        switch (info->chipwidth) {
1727        case FLASH_CFI_8BIT:
1728                info->device_id = flash_read_uchar(info,
1729                                                   FLASH_OFFSET_DEVICE_ID);
1730                if (info->device_id == 0x7E) {
1731                        /* AMD 3-byte (expanded) device ids */
1732                        info->device_id2 = flash_read_uchar(info,
1733                                                            FLASH_OFFSET_DEVICE_ID2);
1734                        info->device_id2 <<= 8;
1735                        info->device_id2 |= flash_read_uchar(info,
1736                                                FLASH_OFFSET_DEVICE_ID3);
1737                }
1738                break;
1739        case FLASH_CFI_16BIT:
1740                info->device_id = flash_read_word(info,
1741                                                  FLASH_OFFSET_DEVICE_ID);
1742                if ((info->device_id & 0xff) == 0x7E) {
1743                        /* AMD 3-byte (expanded) device ids */
1744                        info->device_id2 = flash_read_uchar(info,
1745                                                            FLASH_OFFSET_DEVICE_ID2);
1746                        info->device_id2 <<= 8;
1747                        info->device_id2 |= flash_read_uchar(info,
1748                                                FLASH_OFFSET_DEVICE_ID3);
1749                }
1750                break;
1751        default:
1752                break;
1753        }
1754        flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1755        udelay(1);
1756}
1757
1758static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1759{
1760        info->cmd_reset = AMD_CMD_RESET;
1761        info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1762
1763        cmdset_amd_read_jedec_ids(info);
1764        flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1765
1766#ifdef CONFIG_SYS_FLASH_PROTECTION
1767        if (info->ext_addr) {
1768                /* read sector protect/unprotect scheme (at 0x49) */
1769                if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1770                        info->legacy_unlock = 1;
1771        }
1772#endif
1773
1774        return 0;
1775}
1776
1777#ifdef CONFIG_FLASH_CFI_LEGACY
1778static void flash_read_jedec_ids(flash_info_t *info)
1779{
1780        info->manufacturer_id = 0;
1781        info->device_id       = 0;
1782        info->device_id2      = 0;
1783
1784        switch (info->vendor) {
1785        case CFI_CMDSET_INTEL_PROG_REGIONS:
1786        case CFI_CMDSET_INTEL_STANDARD:
1787        case CFI_CMDSET_INTEL_EXTENDED:
1788                cmdset_intel_read_jedec_ids(info);
1789                break;
1790        case CFI_CMDSET_AMD_STANDARD:
1791        case CFI_CMDSET_AMD_EXTENDED:
1792                cmdset_amd_read_jedec_ids(info);
1793                break;
1794        default:
1795                break;
1796        }
1797}
1798
1799/*-----------------------------------------------------------------------
1800 * Call board code to request info about non-CFI flash.
1801 * board_flash_get_legacy needs to fill in at least:
1802 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1803 */
1804static int flash_detect_legacy(phys_addr_t base, int banknum)
1805{
1806        flash_info_t *info = &flash_info[banknum];
1807
1808        if (board_flash_get_legacy(base, banknum, info)) {
1809                /* board code may have filled info completely. If not, we
1810                 * use JEDEC ID probing.
1811                 */
1812                if (!info->vendor) {
1813                        int modes[] = {
1814                                CFI_CMDSET_AMD_STANDARD,
1815                                CFI_CMDSET_INTEL_STANDARD
1816                        };
1817                        int i;
1818
1819                        for (i = 0; i < ARRAY_SIZE(modes); i++) {
1820                                info->vendor = modes[i];
1821                                info->start[0] =
1822                                        (ulong)map_physmem(base,
1823                                                           info->portwidth,
1824                                                           MAP_NOCACHE);
1825                                if (info->portwidth == FLASH_CFI_8BIT &&
1826                                    info->interface == FLASH_CFI_X8X16) {
1827                                        info->addr_unlock1 = 0x2AAA;
1828                                        info->addr_unlock2 = 0x5555;
1829                                } else {
1830                                        info->addr_unlock1 = 0x5555;
1831                                        info->addr_unlock2 = 0x2AAA;
1832                                }
1833                                flash_read_jedec_ids(info);
1834                                debug("JEDEC PROBE: ID %x %x %x\n",
1835                                      info->manufacturer_id,
1836                                      info->device_id,
1837                                      info->device_id2);
1838                                if (jedec_flash_match(info, info->start[0]))
1839                                        break;
1840
1841                                unmap_physmem((void *)info->start[0],
1842                                              info->portwidth);
1843                        }
1844                }
1845
1846                switch (info->vendor) {
1847                case CFI_CMDSET_INTEL_PROG_REGIONS:
1848                case CFI_CMDSET_INTEL_STANDARD:
1849                case CFI_CMDSET_INTEL_EXTENDED:
1850                        info->cmd_reset = FLASH_CMD_RESET;
1851                        break;
1852                case CFI_CMDSET_AMD_STANDARD:
1853                case CFI_CMDSET_AMD_EXTENDED:
1854                case CFI_CMDSET_AMD_LEGACY:
1855                        info->cmd_reset = AMD_CMD_RESET;
1856                        break;
1857                }
1858                info->flash_id = FLASH_MAN_CFI;
1859                return 1;
1860        }
1861        return 0; /* use CFI */
1862}
1863#else
1864static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1865{
1866        return 0; /* use CFI */
1867}
1868#endif
1869
1870/*-----------------------------------------------------------------------
1871 * detect if flash is compatible with the Common Flash Interface (CFI)
1872 * http://www.jedec.org/download/search/jesd68.pdf
1873 */
1874static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1875                           size_t len)
1876{
1877        u8 *p = buf;
1878        unsigned int i;
1879
1880        for (i = 0; i < len; i++)
1881                p[i] = flash_read_uchar(info, start + i);
1882}
1883
1884static void __flash_cmd_reset(flash_info_t *info)
1885{
1886        /*
1887         * We do not yet know what kind of commandset to use, so we issue
1888         * the reset command in both Intel and AMD variants, in the hope
1889         * that AMD flash roms ignore the Intel command.
1890         */
1891        flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1892        udelay(1);
1893        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1894}
1895
1896void flash_cmd_reset(flash_info_t *info)
1897        __attribute__((weak, alias("__flash_cmd_reset")));
1898
1899static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1900{
1901        int cfi_offset;
1902
1903        /* Issue FLASH reset command */
1904        flash_cmd_reset(info);
1905
1906        for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1907             cfi_offset++) {
1908                flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1909                                FLASH_CMD_CFI);
1910                if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1911                    flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1912                    flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1913                        flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1914                                       sizeof(struct cfi_qry));
1915                        info->interface = le16_to_cpu(qry->interface_desc);
1916
1917                        info->cfi_offset = flash_offset_cfi[cfi_offset];
1918                        debug("device interface is %d\n",
1919                              info->interface);
1920                        debug("found port %d chip %d ",
1921                              info->portwidth, info->chipwidth);
1922                        debug("port %d bits chip %d bits\n",
1923                              info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1924                              info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1925
1926                        /* calculate command offsets as in the Linux driver */
1927                        info->addr_unlock1 = 0x555;
1928                        info->addr_unlock2 = 0x2aa;
1929
1930                        /*
1931                         * modify the unlock address if we are
1932                         * in compatibility mode
1933                         */
1934                        if (/* x8/x16 in x8 mode */
1935                            (info->chipwidth == FLASH_CFI_BY8 &&
1936                                info->interface == FLASH_CFI_X8X16) ||
1937                            /* x16/x32 in x16 mode */
1938                            (info->chipwidth == FLASH_CFI_BY16 &&
1939                                info->interface == FLASH_CFI_X16X32)) {
1940                                info->addr_unlock1 = 0xaaa;
1941                                info->addr_unlock2 = 0x555;
1942                        }
1943
1944                        info->name = "CFI conformant";
1945                        return 1;
1946                }
1947        }
1948
1949        return 0;
1950}
1951
1952static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1953{
1954        debug("flash detect cfi\n");
1955
1956        for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1957             info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1958                for (info->chipwidth = FLASH_CFI_BY8;
1959                     info->chipwidth <= info->portwidth;
1960                     info->chipwidth <<= 1)
1961                        if (__flash_detect_cfi(info, qry))
1962                                return 1;
1963        }
1964        debug("not found\n");
1965        return 0;
1966}
1967
1968/*
1969 * Manufacturer-specific quirks. Add workarounds for geometry
1970 * reversal, etc. here.
1971 */
1972static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1973{
1974        /* check if flash geometry needs reversal */
1975        if (qry->num_erase_regions > 1) {
1976                /* reverse geometry if top boot part */
1977                if (info->cfi_version < 0x3131) {
1978                        /* CFI < 1.1, try to guess from device id */
1979                        if ((info->device_id & 0x80) != 0)
1980                                cfi_reverse_geometry(qry);
1981                } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1982                        /* CFI >= 1.1, deduct from top/bottom flag */
1983                        /* note: ext_addr is valid since cfi_version > 0 */
1984                        cfi_reverse_geometry(qry);
1985                }
1986        }
1987}
1988
1989static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1990{
1991        int reverse_geometry = 0;
1992
1993        /* Check the "top boot" bit in the PRI */
1994        if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1995                reverse_geometry = 1;
1996
1997        /* AT49BV6416(T) list the erase regions in the wrong order.
1998         * However, the device ID is identical with the non-broken
1999         * AT49BV642D they differ in the high byte.
2000         */
2001        if (info->device_id == 0xd6 || info->device_id == 0xd2)
2002                reverse_geometry = !reverse_geometry;
2003
2004        if (reverse_geometry)
2005                cfi_reverse_geometry(qry);
2006}
2007
2008static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2009{
2010        /* check if flash geometry needs reversal */
2011        if (qry->num_erase_regions > 1) {
2012                /* reverse geometry if top boot part */
2013                if (info->cfi_version < 0x3131) {
2014                        /* CFI < 1.1, guess by device id */
2015                        if (info->device_id == 0x22CA || /* M29W320DT */
2016                            info->device_id == 0x2256 || /* M29W320ET */
2017                            info->device_id == 0x22D7) { /* M29W800DT */
2018                                cfi_reverse_geometry(qry);
2019                        }
2020                } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2021                        /* CFI >= 1.1, deduct from top/bottom flag */
2022                        /* note: ext_addr is valid since cfi_version > 0 */
2023                        cfi_reverse_geometry(qry);
2024                }
2025        }
2026}
2027
2028static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2029{
2030        /*
2031         * SST, for many recent nor parallel flashes, says they are
2032         * CFI-conformant. This is not true, since qry struct.
2033         * reports a std. AMD command set (0x0002), while SST allows to
2034         * erase two different sector sizes for the same memory.
2035         * 64KB sector (SST call it block)  needs 0x30 to be erased.
2036         * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2037         * Since CFI query detect the 4KB number of sectors, users expects
2038         * a sector granularity of 4KB, and it is here set.
2039         */
2040        if (info->device_id == 0x5D23 || /* SST39VF3201B */
2041            info->device_id == 0x5C23) { /* SST39VF3202B */
2042                /* set sector granularity to 4KB */
2043                info->cmd_erase_sector = 0x50;
2044        }
2045}
2046
2047static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2048{
2049        /*
2050         * The M29EW devices seem to report the CFI information wrong
2051         * when it's in 8 bit mode.
2052         * There's an app note from Numonyx on this issue.
2053         * So adjust the buffer size for M29EW while operating in 8-bit mode
2054         */
2055        if (qry->max_buf_write_size > 0x8 &&
2056            info->device_id == 0x7E &&
2057            (info->device_id2 == 0x2201 ||
2058             info->device_id2 == 0x2301 ||
2059             info->device_id2 == 0x2801 ||
2060             info->device_id2 == 0x4801)) {
2061                debug("Adjusted buffer size on Numonyx flash");
2062                debug(" M29EW family in 8 bit mode\n");
2063                qry->max_buf_write_size = 0x8;
2064        }
2065}
2066
2067/*
2068 * The following code cannot be run from FLASH!
2069 *
2070 */
2071ulong flash_get_size(phys_addr_t base, int banknum)
2072{
2073        flash_info_t *info = &flash_info[banknum];
2074        int i, j;
2075        flash_sect_t sect_cnt;
2076        phys_addr_t sector;
2077        unsigned long tmp;
2078        int size_ratio;
2079        uchar num_erase_regions;
2080        int erase_region_size;
2081        int erase_region_count;
2082        struct cfi_qry qry;
2083        unsigned long max_size;
2084
2085        memset(&qry, 0, sizeof(qry));
2086
2087        info->ext_addr = 0;
2088        info->cfi_version = 0;
2089#ifdef CONFIG_SYS_FLASH_PROTECTION
2090        info->legacy_unlock = 0;
2091#endif
2092
2093        info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2094
2095        if (flash_detect_cfi(info, &qry)) {
2096                info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2097                info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2098                num_erase_regions = qry.num_erase_regions;
2099
2100                if (info->ext_addr) {
2101                        info->cfi_version = (ushort)flash_read_uchar(info,
2102                                                info->ext_addr + 3) << 8;
2103                        info->cfi_version |= (ushort)flash_read_uchar(info,
2104                                                info->ext_addr + 4);
2105                }
2106
2107#ifdef DEBUG
2108                flash_printqry(&qry);
2109#endif
2110
2111                switch (info->vendor) {
2112                case CFI_CMDSET_INTEL_PROG_REGIONS:
2113                case CFI_CMDSET_INTEL_STANDARD:
2114                case CFI_CMDSET_INTEL_EXTENDED:
2115                        cmdset_intel_init(info, &qry);
2116                        break;
2117                case CFI_CMDSET_AMD_STANDARD:
2118                case CFI_CMDSET_AMD_EXTENDED:
2119                        cmdset_amd_init(info, &qry);
2120                        break;
2121                default:
2122                        printf("CFI: Unknown command set 0x%x\n",
2123                               info->vendor);
2124                        /*
2125                         * Unfortunately, this means we don't know how
2126                         * to get the chip back to Read mode. Might
2127                         * as well try an Intel-style reset...
2128                         */
2129                        flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2130                        return 0;
2131                }
2132
2133                /* Do manufacturer-specific fixups */
2134                switch (info->manufacturer_id) {
2135                case 0x0001: /* AMD */
2136                case 0x0037: /* AMIC */
2137                        flash_fixup_amd(info, &qry);
2138                        break;
2139                case 0x001f:
2140                        flash_fixup_atmel(info, &qry);
2141                        break;
2142                case 0x0020:
2143                        flash_fixup_stm(info, &qry);
2144                        break;
2145                case 0x00bf: /* SST */
2146                        flash_fixup_sst(info, &qry);
2147                        break;
2148                case 0x0089: /* Numonyx */
2149                        flash_fixup_num(info, &qry);
2150                        break;
2151                }
2152
2153                debug("manufacturer is %d\n", info->vendor);
2154                debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2155                debug("device id is 0x%x\n", info->device_id);
2156                debug("device id2 is 0x%x\n", info->device_id2);
2157                debug("cfi version is 0x%04x\n", info->cfi_version);
2158
2159                size_ratio = info->portwidth / info->chipwidth;
2160                /* if the chip is x8/x16 reduce the ratio by half */
2161                if (info->interface == FLASH_CFI_X8X16 &&
2162                    info->chipwidth == FLASH_CFI_BY8) {
2163                        size_ratio >>= 1;
2164                }
2165                debug("size_ratio %d port %d bits chip %d bits\n",
2166                      size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2167                      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2168                info->size = 1 << qry.dev_size;
2169                /* multiply the size by the number of chips */
2170                info->size *= size_ratio;
2171                max_size = cfi_flash_bank_size(banknum);
2172                if (max_size && info->size > max_size) {
2173                        debug("[truncated from %ldMiB]", info->size >> 20);
2174                        info->size = max_size;
2175                }
2176                debug("found %d erase regions\n", num_erase_regions);
2177                sect_cnt = 0;
2178                sector = base;
2179                for (i = 0; i < num_erase_regions; i++) {
2180                        if (i > NUM_ERASE_REGIONS) {
2181                                printf("%d erase regions found, only %d used\n",
2182                                       num_erase_regions, NUM_ERASE_REGIONS);
2183                                break;
2184                        }
2185
2186                        tmp = le32_to_cpu(get_unaligned(
2187                                                &qry.erase_region_info[i]));
2188                        debug("erase region %u: 0x%08lx\n", i, tmp);
2189
2190                        erase_region_count = (tmp & 0xffff) + 1;
2191                        tmp >>= 16;
2192                        erase_region_size =
2193                                (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2194                        debug("erase_region_count = %d ", erase_region_count);
2195                        debug("erase_region_size = %d\n", erase_region_size);
2196                        for (j = 0; j < erase_region_count; j++) {
2197                                if (sector - base >= info->size)
2198                                        break;
2199                                if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2200                                        printf("ERROR: too many flash sectors\n");
2201                                        break;
2202                                }
2203                                info->start[sect_cnt] =
2204                                        (ulong)map_physmem(sector,
2205                                                           info->portwidth,
2206                                                           MAP_NOCACHE);
2207                                sector += (erase_region_size * size_ratio);
2208
2209                                /*
2210                                 * Only read protection status from
2211                                 * supported devices (intel...)
2212                                 */
2213                                switch (info->vendor) {
2214                                case CFI_CMDSET_INTEL_PROG_REGIONS:
2215                                case CFI_CMDSET_INTEL_EXTENDED:
2216                                case CFI_CMDSET_INTEL_STANDARD:
2217                                        /*
2218                                         * Set flash to read-id mode. Otherwise
2219                                         * reading protected status is not
2220                                         * guaranteed.
2221                                         */
2222                                        flash_write_cmd(info, sect_cnt, 0,
2223                                                        FLASH_CMD_READ_ID);
2224                                        info->protect[sect_cnt] =
2225                                                flash_isset(info, sect_cnt,
2226                                                            FLASH_OFFSET_PROTECT,
2227                                                            FLASH_STATUS_PROTECT);
2228                                        flash_write_cmd(info, sect_cnt, 0,
2229                                                        FLASH_CMD_RESET);
2230                                        break;
2231                                case CFI_CMDSET_AMD_EXTENDED:
2232                                case CFI_CMDSET_AMD_STANDARD:
2233                                        if (!info->legacy_unlock) {
2234                                                /* default: not protected */
2235                                                info->protect[sect_cnt] = 0;
2236                                                break;
2237                                        }
2238
2239                                        /* Read protection (PPB) from sector */
2240                                        flash_write_cmd(info, 0, 0,
2241                                                        info->cmd_reset);
2242                                        flash_unlock_seq(info, 0);
2243                                        flash_write_cmd(info, 0,
2244                                                        info->addr_unlock1,
2245                                                        FLASH_CMD_READ_ID);
2246                                        info->protect[sect_cnt] =
2247                                                flash_isset(
2248                                                        info, sect_cnt,
2249                                                        FLASH_OFFSET_PROTECT,
2250                                                        FLASH_STATUS_PROTECT);
2251                                        break;
2252                                default:
2253                                        /* default: not protected */
2254                                        info->protect[sect_cnt] = 0;
2255                                }
2256
2257                                sect_cnt++;
2258                        }
2259                }
2260
2261                info->sector_count = sect_cnt;
2262#ifdef CONFIG_ZYNQ_M29EW_WB_HACK
2263                qry.max_buf_write_size = 0x8;
2264#endif
2265                info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2266                tmp = 1 << qry.block_erase_timeout_typ;
2267                info->erase_blk_tout = tmp *
2268                        (1 << qry.block_erase_timeout_max);
2269                tmp = (1 << qry.buf_write_timeout_typ) *
2270                        (1 << qry.buf_write_timeout_max);
2271
2272                /* round up when converting to ms */
2273                info->buffer_write_tout = (tmp + 999) / 1000;
2274                tmp = (1 << qry.word_write_timeout_typ) *
2275                        (1 << qry.word_write_timeout_max);
2276                /* round up when converting to ms */
2277                info->write_tout = (tmp + 999) / 1000;
2278                info->flash_id = FLASH_MAN_CFI;
2279                if (info->interface == FLASH_CFI_X8X16 &&
2280                    info->chipwidth == FLASH_CFI_BY8) {
2281                        /* XXX - Need to test on x8/x16 in parallel. */
2282                        info->portwidth >>= 1;
2283                }
2284
2285                flash_write_cmd(info, 0, 0, info->cmd_reset);
2286        }
2287
2288        return (info->size);
2289}
2290
2291#ifdef CONFIG_FLASH_CFI_MTD
2292void flash_set_verbose(uint v)
2293{
2294        flash_verbose = v;
2295}
2296#endif
2297
2298static void cfi_flash_set_config_reg(u32 base, u16 val)
2299{
2300#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2301        /*
2302         * Only set this config register if really defined
2303         * to a valid value (0xffff is invalid)
2304         */
2305        if (val == 0xffff)
2306                return;
2307
2308        /*
2309         * Set configuration register. Data is "encrypted" in the 16 lower
2310         * address bits.
2311         */
2312        flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2313        flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2314
2315        /*
2316         * Finally issue reset-command to bring device back to
2317         * read-array mode
2318         */
2319        flash_write16(FLASH_CMD_RESET, (void *)base);
2320#endif
2321}
2322
2323/*-----------------------------------------------------------------------
2324 */
2325
2326static void flash_protect_default(void)
2327{
2328#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2329        int i;
2330        struct apl_s {
2331                ulong start;
2332                ulong size;
2333        } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2334#endif
2335
2336        /* Monitor protection ON by default */
2337#if defined(CONFIG_SYS_MONITOR_BASE) && \
2338        (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2339        (!defined(CONFIG_MONITOR_IS_IN_RAM))
2340        flash_protect(FLAG_PROTECT_SET,
2341                      CONFIG_SYS_MONITOR_BASE,
2342                      CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2343                      flash_get_info(CONFIG_SYS_MONITOR_BASE));
2344#endif
2345
2346        /* Environment protection ON by default */
2347#ifdef CONFIG_ENV_IS_IN_FLASH
2348        flash_protect(FLAG_PROTECT_SET,
2349                      CONFIG_ENV_ADDR,
2350                      CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2351                      flash_get_info(CONFIG_ENV_ADDR));
2352#endif
2353
2354        /* Redundant environment protection ON by default */
2355#ifdef CONFIG_ENV_ADDR_REDUND
2356        flash_protect(FLAG_PROTECT_SET,
2357                      CONFIG_ENV_ADDR_REDUND,
2358                      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2359                      flash_get_info(CONFIG_ENV_ADDR_REDUND));
2360#endif
2361
2362#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2363        for (i = 0; i < ARRAY_SIZE(apl); i++) {
2364                debug("autoprotecting from %08lx to %08lx\n",
2365                      apl[i].start, apl[i].start + apl[i].size - 1);
2366                flash_protect(FLAG_PROTECT_SET,
2367                              apl[i].start,
2368                              apl[i].start + apl[i].size - 1,
2369                              flash_get_info(apl[i].start));
2370        }
2371#endif
2372}
2373
2374unsigned long flash_init(void)
2375{
2376        unsigned long size = 0;
2377        int i;
2378
2379#ifdef CONFIG_SYS_FLASH_PROTECTION
2380        /* read environment from EEPROM */
2381        char s[64];
2382
2383        env_get_f("unlock", s, sizeof(s));
2384#endif
2385
2386#ifdef CONFIG_CFI_FLASH /* for driver model */
2387        cfi_flash_init_dm();
2388#endif
2389
2390        /* Init: no FLASHes known */
2391        for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2392                flash_info[i].flash_id = FLASH_UNKNOWN;
2393
2394                /* Optionally write flash configuration register */
2395                cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2396                                         cfi_flash_config_reg(i));
2397
2398                if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2399                        flash_get_size(cfi_flash_bank_addr(i), i);
2400                size += flash_info[i].size;
2401                if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2402#ifndef CONFIG_SYS_FLASH_QUIET_TEST
2403                        printf("## Unknown flash on Bank %d ", i + 1);
2404                        printf("- Size = 0x%08lx = %ld MB\n",
2405                               flash_info[i].size,
2406                               flash_info[i].size >> 20);
2407#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2408                }
2409#ifdef CONFIG_SYS_FLASH_PROTECTION
2410                else if (strcmp(s, "yes") == 0) {
2411                        /*
2412                         * Only the U-Boot image and it's environment
2413                         * is protected, all other sectors are
2414                         * unprotected (unlocked) if flash hardware
2415                         * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2416                         * and the environment variable "unlock" is
2417                         * set to "yes".
2418                         */
2419                        if (flash_info[i].legacy_unlock) {
2420                                int k;
2421
2422                                /*
2423                                 * Disable legacy_unlock temporarily,
2424                                 * since flash_real_protect would
2425                                 * relock all other sectors again
2426                                 * otherwise.
2427                                 */
2428                                flash_info[i].legacy_unlock = 0;
2429
2430                                /*
2431                                 * Legacy unlocking (e.g. Intel J3) ->
2432                                 * unlock only one sector. This will
2433                                 * unlock all sectors.
2434                                 */
2435                                flash_real_protect(&flash_info[i], 0, 0);
2436
2437                                flash_info[i].legacy_unlock = 1;
2438
2439                                /*
2440                                 * Manually mark other sectors as
2441                                 * unlocked (unprotected)
2442                                 */
2443                                for (k = 1; k < flash_info[i].sector_count; k++)
2444                                        flash_info[i].protect[k] = 0;
2445                        } else {
2446                                /*
2447                                 * No legancy unlocking -> unlock all sectors
2448                                 */
2449                                flash_protect(FLAG_PROTECT_CLEAR,
2450                                              flash_info[i].start[0],
2451                                              flash_info[i].start[0]
2452                                              + flash_info[i].size - 1,
2453                                              &flash_info[i]);
2454                        }
2455                }
2456#endif /* CONFIG_SYS_FLASH_PROTECTION */
2457        }
2458
2459        flash_protect_default();
2460#ifdef CONFIG_FLASH_CFI_MTD
2461        cfi_mtd_init();
2462#endif
2463
2464        return (size);
2465}
2466
2467#ifdef CONFIG_CFI_FLASH /* for driver model */
2468static int cfi_flash_probe(struct udevice *dev)
2469{
2470        const fdt32_t *cell;
2471        int addrc, sizec;
2472        int len, idx;
2473
2474        addrc = dev_read_addr_cells(dev);
2475        sizec = dev_read_size_cells(dev);
2476
2477        /* decode regs; there may be multiple reg tuples. */
2478        cell = dev_read_prop(dev, "reg", &len);
2479        if (!cell)
2480                return -ENOENT;
2481        idx = 0;
2482        len /= sizeof(fdt32_t);
2483        while (idx < len) {
2484                phys_addr_t addr;
2485
2486                addr = dev_translate_address(dev, cell + idx);
2487
2488                flash_info[cfi_flash_num_flash_banks].dev = dev;
2489                flash_info[cfi_flash_num_flash_banks].base = addr;
2490                cfi_flash_num_flash_banks++;
2491
2492                idx += addrc + sizec;
2493        }
2494        gd->bd->bi_flashstart = flash_info[0].base;
2495
2496        return 0;
2497}
2498
2499static const struct udevice_id cfi_flash_ids[] = {
2500        { .compatible = "cfi-flash" },
2501        { .compatible = "jedec-flash" },
2502        {}
2503};
2504
2505U_BOOT_DRIVER(cfi_flash) = {
2506        .name   = "cfi_flash",
2507        .id     = UCLASS_MTD,
2508        .of_match = cfi_flash_ids,
2509        .probe = cfi_flash_probe,
2510};
2511#endif /* CONFIG_CFI_FLASH */
2512