LXR uboot/include/configs/dra7xx

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2013
   4 * Texas Instruments Incorporated.
   5 * Lokesh Vutla   <lokeshvutla@ti.com>
   6 *
   7 * Configuration settings for the TI DRA7XX board.
   8 * See ti_omap5_common.h for omap5 common settings.
   9 */
  10
  11#ifndef __CONFIG_DRA7XX_EVM_H
  12#define __CONFIG_DRA7XX_EVM_H
  13
  14#include <environment/ti/dfu.h>
  15
  16#define CONFIG_IODELAY_RECALIBRATION
  17
  18#define CONFIG_VERY_BIG_RAM
  19#define CONFIG_MAX_MEM_MAPPED           0x80000000
  20
  21#ifndef CONFIG_QSPI_BOOT
  22/* MMC ENV related defines */
  23#define CONFIG_SYS_MMC_ENV_DEV          1       /* SLOT2: eMMC(1) */
  24#endif
  25
  26#if (CONFIG_CONS_INDEX == 1)
  27#define CONSOLEDEV                      "ttyS0"
  28#elif (CONFIG_CONS_INDEX == 3)
  29#define CONSOLEDEV                      "ttyS2"
  30#endif
  31#define CONFIG_SYS_NS16550_COM1         UART1_BASE      /* Base EVM has UART0 */
  32#define CONFIG_SYS_NS16550_COM2         UART2_BASE      /* UART2 */
  33#define CONFIG_SYS_NS16550_COM3         UART3_BASE      /* UART3 */
  34
  35#define CONFIG_ENV_EEPROM_IS_ON_I2C
  36#define CONFIG_SYS_I2C_EEPROM_ADDR      0x50    /* Main EEPROM */
  37#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  38
  39#define CONFIG_SYS_OMAP_ABE_SYSCK
  40
  41#ifndef CONFIG_SPL_BUILD
  42#define DFUARGS \
  43        "dfu_bufsiz=0x10000\0" \
  44        DFU_ALT_INFO_MMC \
  45        DFU_ALT_INFO_EMMC \
  46        DFU_ALT_INFO_RAM \
  47        DFU_ALT_INFO_QSPI
  48#endif
  49
  50#ifdef CONFIG_SPL_BUILD
  51#undef CONFIG_CMD_BOOTD
  52#ifdef CONFIG_SPL_DFU
  53#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
  54#define DFUARGS \
  55        "dfu_bufsiz=0x10000\0" \
  56        DFU_ALT_INFO_RAM
  57#endif
  58#endif
  59
  60#include <configs/ti_omap5_common.h>
  61
  62/* Enhance our eMMC support / experience. */
  63#define CONFIG_HSMMC2_8BIT
  64
  65/* CPSW Ethernet */
  66#define CONFIG_BOOTP_SEND_HOSTNAME
  67#define CONFIG_NET_RETRY_COUNT          10
  68
  69/*
  70 * Default to using SPI for environment, etc.
  71 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
  72 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
  73 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
  74 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
  75 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
  76 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
  77 * 0x9E0000 - 0x2000000 : USERLAND
  78 */
  79#define CONFIG_SYS_SPI_KERNEL_OFFS      0x1E0000
  80#define CONFIG_SYS_SPI_ARGS_OFFS        0x140000
  81#define CONFIG_SYS_SPI_ARGS_SIZE        0x80000
  82
  83/* SPI SPL */
  84
  85/* USB xHCI HOST */
  86#define CONFIG_USB_XHCI_OMAP
  87
  88#define CONFIG_OMAP_USB2PHY2_HOST
  89
  90/* SATA */
  91#define CONFIG_SCSI_AHCI_PLAT
  92
  93/* NAND support */
  94#ifdef CONFIG_MTD_RAW_NAND
  95/* NAND: device related configs */
  96#define CONFIG_SYS_NAND_PAGE_SIZE       2048
  97#define CONFIG_SYS_NAND_OOBSIZE         64
  98#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
  99#define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 100                                         CONFIG_SYS_NAND_PAGE_SIZE)
 101#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 102/* NAND: driver related configs */
 103#define CONFIG_SYS_NAND_ONFI_DETECTION
 104#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW
 105#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 106#define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
 107                                         10, 11, 12, 13, 14, 15, 16, 17, \
 108                                         18, 19, 20, 21, 22, 23, 24, 25, \
 109                                         26, 27, 28, 29, 30, 31, 32, 33, \
 110                                         34, 35, 36, 37, 38, 39, 40, 41, \
 111                                         42, 43, 44, 45, 46, 47, 48, 49, \
 112                                         50, 51, 52, 53, 54, 55, 56, 57, }
 113#define CONFIG_SYS_NAND_ECCSIZE         512
 114#define CONFIG_SYS_NAND_ECCBYTES        14
 115#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x00140000
 116/* NAND: SPL related configs */
 117/* NAND: SPL falcon mode configs */
 118#ifdef CONFIG_SPL_OS_BOOT
 119#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
 120#endif
 121#endif /* !CONFIG_MTD_RAW_NAND */
 122
 123/* Parallel NOR Support */
 124#if defined(CONFIG_NOR)
 125/* NOR: device related configs */
 126#define CONFIG_SYS_MAX_FLASH_SECT       512
 127#define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 128#define CONFIG_SYS_FLASH_SIZE           (64 * 1024 * 1024) /* 64 MB */
 129/* #define CONFIG_INIT_IGNORE_ERROR */
 130#define CONFIG_SYS_MAX_FLASH_BANKS      1
 131#define CONFIG_SYS_FLASH_BASE           (0x08000000)
 132#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 133/* Reduce SPL size by removing unlikey targets */
 134#endif  /* NOR support */
 135
 136#endif /* __CONFIG_DRA7XX_EVM_H */
 137