uboot/include/configs/tegra-common.h
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   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 *  (C) Copyright 2010-2012
   4 *  NVIDIA Corporation <www.nvidia.com>
   5 */
   6
   7#ifndef _TEGRA_COMMON_H_
   8#define _TEGRA_COMMON_H_
   9#include <linux/sizes.h>
  10#include <linux/stringify.h>
  11
  12/*
  13 * High Level Configuration Options
  14 */
  15#define CONFIG_SYS_L2CACHE_OFF          /* No L2 cache */
  16
  17#include <asm/arch/tegra.h>             /* get chip and board defs */
  18
  19/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
  20#ifndef CONFIG_ARM64
  21#define CONFIG_SYS_TIMER_RATE           1000000
  22#define CONFIG_SYS_TIMER_COUNTER        NV_PA_TMRUS_BASE
  23#endif
  24
  25#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  26
  27/* Environment */
  28
  29/*
  30 * NS16550 Configuration
  31 */
  32#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  33
  34/*
  35 * Common HW configuration.
  36 * If this varies between SoCs later, move to tegraNN-common.h
  37 * Note: This is number of devices, not max device ID.
  38 */
  39#define CONFIG_SYS_MMC_MAX_DEVICE 4
  40
  41/* allow to overwrite serial and ethaddr */
  42#define CONFIG_ENV_OVERWRITE
  43
  44/*
  45 * Increasing the size of the IO buffer as default nfsargs size is more
  46 *  than 256 and so it is not possible to edit it
  47 */
  48#define CONFIG_SYS_CBSIZE               (1024 * 2) /* Console I/O Buffer Size */
  49/* Print Buffer Size */
  50#define CONFIG_SYS_MAXARGS              64      /* max number of command args */
  51
  52/* Boot Argument Buffer Size */
  53#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
  54
  55#define CONFIG_SYS_MEMTEST_START        (NV_PA_SDRC_CS0 + 0x600000)
  56#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x100000)
  57
  58/*-----------------------------------------------------------------------
  59 * Physical Memory Map
  60 */
  61#define PHYS_SDRAM_1            NV_PA_SDRC_CS0
  62#define PHYS_SDRAM_1_SIZE       0x20000000      /* 512M */
  63
  64#define CONFIG_SYS_UBOOT_START  CONFIG_SYS_TEXT_BASE
  65#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
  66
  67#define CONFIG_SYS_BOOTMAPSZ    (256 << 20)     /* 256M */
  68
  69#ifndef CONFIG_ARM64
  70#define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_STACKBASE
  71#define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_MALLOC_LEN
  72#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
  73                                                CONFIG_SYS_INIT_RAM_SIZE - \
  74                                                GENERATED_GBL_DATA_SIZE)
  75#endif
  76
  77#ifndef CONFIG_ARM64
  78/* Defines for SPL */
  79#define CONFIG_SPL_MAX_FOOTPRINT        (CONFIG_SYS_TEXT_BASE - \
  80                                                CONFIG_SPL_TEXT_BASE)
  81#define CONFIG_SYS_SPL_MALLOC_SIZE      0x00010000
  82#endif
  83
  84#endif /* _TEGRA_COMMON_H_ */
  85