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10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13
14
15
16#define CONFIG_SYS_BOARD_NAME "XPedite5170"
17#define CONFIG_SYS_FORM_3U_VPX 1
18#define CONFIG_LINUX_RESET_VEC 0x100
19#define CONFIG_BAT_RW 1
20#define CONFIG_ALTIVEC 1
21
22#define CONFIG_PCI_SCAN_SHOW 1
23#define CONFIG_PCIE1 1
24#define CONFIG_PCIE2 1
25#define CONFIG_FSL_PCI_INIT 1
26#define CONFIG_PCI_INDIRECT_BRIDGE 1
27#define CONFIG_SYS_PCI_64BIT 1
28
29
30
31
32#define CONFIG_SPD_EEPROM
33#define CONFIG_DDR_SPD
34#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
35#define SPD_EEPROM_ADDRESS1 0x54
36#define SPD_EEPROM_ADDRESS2 0x54
37#define SPD_EEPROM_OFFSET 0x200
38#define CONFIG_DIMM_SLOTS_PER_CTLR 1
39#define CONFIG_CHIP_SELECTS_PER_CTRL 1
40#define CONFIG_DDR_ECC
41#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
42#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
43#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
44#define CONFIG_VERY_BIG_RAM
45#define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000
46
47
48
49
50
51#define CONFIG_SYS_SCRATCH_VA 0xe0000000
52
53#ifndef __ASSEMBLY__
54extern unsigned long get_board_sys_clk(unsigned long dummy);
55#endif
56
57#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
58
59
60
61
62#define CONFIG_SYS_L2
63#define L2_INIT 0
64#define L2_ENABLE (L2CR_L2E)
65
66
67
68
69
70#define CONFIG_SYS_CCSRBAR 0xef000000
71#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
72#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
73#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
74#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
75
76
77
78
79#define CONFIG_SYS_MEMTEST_START 0x10000000
80#define CONFIG_SYS_MEMTEST_END 0x20000000
81#define CONFIG_POST (CONFIG_SYS_POST_MEMORY |\
82 CONFIG_SYS_POST_I2C)
83
84#define I2C_ADDR_IGNORE_LIST {0x50}
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_4 | LCRR_EADC_3)
101
102
103
104
105#define CONFIG_SYS_NAND_BASE 0xef800000
106#define CONFIG_SYS_NAND_BASE2 0xef840000
107#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE2}
108#define CONFIG_SYS_MAX_NAND_DEVICE 2
109#define CONFIG_NAND_ACTL
110#define CONFIG_SYS_NAND_ACTL_ALE (1 << 14)
111#define CONFIG_SYS_NAND_ACTL_CLE (1 << 15)
112#define CONFIG_SYS_NAND_ACTL_NCE 0
113#define CONFIG_SYS_NAND_ACTL_DELAY 25
114#define CONFIG_JFFS2_NAND
115
116
117
118
119#define CONFIG_SYS_FLASH_BASE 0xf8000000
120#define CONFIG_SYS_FLASH_BASE2 0xf0000000
121#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
122#define CONFIG_SYS_MAX_FLASH_BANKS 2
123#define CONFIG_SYS_MAX_FLASH_SECT 1024
124#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
125#define CONFIG_SYS_FLASH_WRITE_TOUT 500
126#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff00000, 0xc0000}, \
127 {0xf7f00000, 0xc0000} }
128#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
129#define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000
130
131
132
133
134
135#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE |\
136 BR_PS_16 |\
137 BR_V)
138#define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB |\
139 OR_GPCM_CSNT |\
140 OR_GPCM_XACS |\
141 OR_GPCM_ACS_DIV2 |\
142 OR_GPCM_SCY_8 |\
143 OR_GPCM_TRLX |\
144 OR_GPCM_EHTR |\
145 OR_GPCM_EAD)
146
147
148#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 |\
149 BR_PS_16 |\
150 BR_V)
151#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM
152
153
154#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE |\
155 BR_PS_8 |\
156 BR_V)
157#define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB |\
158 OR_GPCM_BCTLD |\
159 OR_GPCM_CSNT |\
160 OR_GPCM_ACS_DIV4 |\
161 OR_GPCM_SCY_4 |\
162 OR_GPCM_TRLX |\
163 OR_GPCM_EHTR)
164
165
166#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 |\
167 BR_PS_8 |\
168 BR_V)
169#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM
170
171
172
173
174#define CONFIG_SYS_INIT_RAM_LOCK 1
175#define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000
176#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
177
178#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
179#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
180
181#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
182#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
183
184
185
186
187#define CONFIG_SYS_NS16550_SERIAL
188#define CONFIG_SYS_NS16550_REG_SIZE 1
189#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
190#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
191#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
192#define CONFIG_SYS_BAUDRATE_TABLE \
193 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
194#define CONFIG_LOADS_ECHO 1
195#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
196
197
198
199
200#define CONFIG_SYS_I2C
201#define CONFIG_SYS_I2C_FSL
202#define CONFIG_SYS_FSL_I2C_SPEED 100000
203#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
204#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
205#define CONFIG_SYS_FSL_I2C2_SPEED 100000
206#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
207#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
208
209
210#define CONFIG_SYS_I2C_PEX8518_ADDR 0x70
211
212
213#define CONFIG_SYS_I2C_LM90_ADDR 0x4c
214
215
216#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
217#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
218#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
219#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
220
221
222#define CONFIG_RTC_M41T11 1
223#define CONFIG_SYS_I2C_RTC_ADDR 0x68
224#define CONFIG_SYS_M41T11_BASE_YEAR 2000
225
226
227#define CONFIG_PCA953X
228#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18
229#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x1c
230#define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e
231#define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f
232#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0
233#define CONFIG_SYS_I2C_PCA9553_ADDR 0x62
234
235
236
237
238
239
240#define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01
241#define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02
242#define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04
243#define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08
244#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10
245#define CONFIG_SYS_PCA953X_NVM_WP 0x20
246
247
248#define CONFIG_SYS_PCA953X_XMC0_ROOT0 0x01
249#define CONFIG_SYS_PCA953X_PLUG_GPIO0 0x02
250#define CONFIG_SYS_PCA953X_XMC0_WAKE 0x04
251#define CONFIG_SYS_PCA953X_XMC0_BIST 0x08
252#define CONFIG_SYS_PCA953X_XMC_PRESENT 0x10
253#define CONFIG_SYS_PCA953X_PMC_PRESENT 0x20
254#define CONFIG_SYS_PCA953X_PMC0_MONARCH 0x40
255#define CONFIG_SYS_PCA953X_PMC0_EREADY 0x80
256
257
258#define CONFIG_SYS_PCA953X_P0_GA0 0x01
259#define CONFIG_SYS_PCA953X_P0_GA1 0x02
260#define CONFIG_SYS_PCA953X_P0_GA2 0x04
261#define CONFIG_SYS_PCA953X_P0_GA3 0x08
262#define CONFIG_SYS_PCA953X_P0_GA4 0x10
263#define CONFIG_SYS_PCA953X_P0_GAP 0x20
264#define CONFIG_SYS_PCA953X_P1_SYSEN 0x80
265
266
267#define CONFIG_SYS_PCA953X_VPX_GPIO0 0x01
268#define CONFIG_SYS_PCA953X_VPX_GPIO1 0x02
269#define CONFIG_SYS_PCA953X_VPX_GPIO2 0x04
270#define CONFIG_SYS_PCA953X_VPX_GPIO3 0x08
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276
277#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000
278#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
279#define CONFIG_SYS_PCIE1_MEM_SIZE 0x40000000
280#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
281#define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000
282#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000
283
284
285#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000
286#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BUS
287#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000
288#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
289#define CONFIG_SYS_PCIE2_IO_PHYS 0xe8800000
290#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000
291
292
293
294
295#define CONFIG_ETHPRIME "eTSEC1"
296
297#define CONFIG_TSEC1 1
298#define CONFIG_TSEC1_NAME "eTSEC1"
299#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
300#define TSEC1_PHY_ADDR 1
301#define TSEC1_PHYIDX 0
302#define CONFIG_HAS_ETH0
303
304#define CONFIG_TSEC2 1
305#define CONFIG_TSEC2_NAME "eTSEC2"
306#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
307#define TSEC2_PHY_ADDR 2
308#define TSEC2_PHYIDX 0
309#define CONFIG_HAS_ETH1
310
311
312
313
314#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
315#define CONFIG_SYS_CCSR_DEFAULT_DBATL (CONFIG_SYS_CCSRBAR_DEFAULT |\
316 BATL_PP_RW |\
317 BATL_CACHEINHIBIT |\
318 BATL_GUARDEDSTORAGE)
319#define CONFIG_SYS_CCSR_DEFAULT_DBATU (CONFIG_SYS_CCSRBAR_DEFAULT |\
320 BATU_BL_1M |\
321 BATU_VS |\
322 BATU_VP)
323#define CONFIG_SYS_CCSR_DEFAULT_IBATL (CONFIG_SYS_CCSRBAR_DEFAULT |\
324 BATL_PP_RW |\
325 BATL_CACHEINHIBIT)
326#define CONFIG_SYS_CCSR_DEFAULT_IBATU CONFIG_SYS_CCSR_DEFAULT_DBATU
327#endif
328
329
330
331
332
333#define CONFIG_SYS_DBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE)
334#define CONFIG_SYS_DBAT0U (BATU_BL_2G | BATU_VS | BATU_VP)
335#define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE)
336#define CONFIG_SYS_IBAT0U CONFIG_SYS_DBAT0U
337
338
339
340
341
342#define CONFIG_SYS_DBAT1L (CONFIG_SYS_PCIE1_MEM_PHYS |\
343 BATL_PP_RW |\
344 BATL_CACHEINHIBIT |\
345 BATL_GUARDEDSTORAGE)
346#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCIE1_MEM_PHYS |\
347 BATU_BL_1G |\
348 BATU_VS |\
349 BATU_VP)
350#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCIE1_MEM_PHYS |\
351 BATL_PP_RW |\
352 BATL_CACHEINHIBIT)
353#define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U
354
355
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357
358
359#define CONFIG_SYS_DBAT2L (CONFIG_SYS_PCIE2_MEM_PHYS |\
360 BATL_PP_RW |\
361 BATL_CACHEINHIBIT |\
362 BATL_GUARDEDSTORAGE)
363#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCIE2_MEM_PHYS |\
364 BATU_BL_512M |\
365 BATU_VS |\
366 BATU_VP)
367#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCIE2_MEM_PHYS |\
368 BATL_PP_RW |\
369 BATL_CACHEINHIBIT)
370#define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U
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372
373
374
375
376#define CONFIG_SYS_DBAT3L (CONFIG_SYS_CCSRBAR |\
377 BATL_PP_RW |\
378 BATL_CACHEINHIBIT |\
379 BATL_GUARDEDSTORAGE)
380#define CONFIG_SYS_DBAT3U (CONFIG_SYS_CCSRBAR |\
381 BATU_BL_1M |\
382 BATU_VS |\
383 BATU_VP)
384#define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR |\
385 BATL_PP_RW |\
386 BATL_CACHEINHIBIT)
387#define CONFIG_SYS_IBAT3U CONFIG_SYS_DBAT3U
388
389
390
391
392
393
394#define CONFIG_SYS_DBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
395 BATL_PP_RW |\
396 BATL_CACHEINHIBIT |\
397 BATL_GUARDEDSTORAGE)
398#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE1_IO_PHYS |\
399 BATU_BL_32M |\
400 BATU_VS |\
401 BATU_VP)
402#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
403 BATL_PP_RW |\
404 BATL_CACHEINHIBIT)
405#define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U
406
407
408
409
410
411#define CONFIG_SYS_DBAT5L (CONFIG_SYS_INIT_RAM_ADDR |\
412 BATL_PP_RW |\
413 BATL_MEMCOHERENCE)
414#define CONFIG_SYS_DBAT5U (CONFIG_SYS_INIT_RAM_ADDR |\
415 BATU_BL_128K |\
416 BATU_VS |\
417 BATU_VP)
418#define CONFIG_SYS_IBAT5L CONFIG_SYS_DBAT5L
419#define CONFIG_SYS_IBAT5U CONFIG_SYS_DBAT5U
420
421
422
423
424
425#define CONFIG_SYS_DBAT6L (CONFIG_SYS_FLASH_BASE2 |\
426 BATL_PP_RW |\
427 BATL_CACHEINHIBIT |\
428 BATL_GUARDEDSTORAGE)
429#define CONFIG_SYS_DBAT6U (CONFIG_SYS_FLASH_BASE |\
430 BATU_BL_256M |\
431 BATU_VS |\
432 BATU_VP)
433#define CONFIG_SYS_IBAT6L (CONFIG_SYS_FLASH_BASE |\
434 BATL_PP_RW |\
435 BATL_MEMCOHERENCE)
436#define CONFIG_SYS_IBAT6U CONFIG_SYS_DBAT6U
437
438
439#define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY |\
440 BATL_PP_RW |\
441 BATL_CACHEINHIBIT |\
442 BATL_GUARDEDSTORAGE)
443#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE |\
444 BATU_BL_1M |\
445 BATU_VS |\
446 BATU_VP)
447#define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY |\
448 BATL_PP_RW |\
449 BATL_MEMCOHERENCE)
450#define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY
451
452
453
454
455
456
457#define CONFIG_SYS_DBAT7L (CONFIG_SYS_NAND_BASE |\
458 BATL_PP_RW |\
459 BATL_CACHEINHIBIT |\
460 BATL_GUARDEDSTORAGE)
461#define CONFIG_SYS_DBAT7U (CONFIG_SYS_NAND_BASE |\
462 BATU_BL_512K |\
463 BATU_VS |\
464 BATU_VP)
465#define CONFIG_SYS_IBAT7L (CONFIG_SYS_NAND_BASE |\
466 BATL_PP_RW |\
467 BATL_CACHEINHIBIT)
468#define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U
469
470
471
472
473#define CONFIG_SYS_LOAD_ADDR 0x2000000
474#define CONFIG_LOADADDR 0x1000000
475#define CONFIG_INTEGRITY
476
477
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479
480
481
482#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
483#define CONFIG_SYS_BOOTM_LEN (16 << 20)
484
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501
502
503#define CONFIG_UBOOT1_ENV_ADDR __stringify(0xfff00000)
504#define CONFIG_UBOOT2_ENV_ADDR __stringify(0xf7f00000)
505#define CONFIG_FDT1_ENV_ADDR __stringify(0xfffc0000)
506#define CONFIG_FDT2_ENV_ADDR __stringify(0xf7fc0000)
507#define CONFIG_OS1_ENV_ADDR __stringify(0xfef00000)
508#define CONFIG_OS2_ENV_ADDR __stringify(0xf6f00000)
509
510#define CONFIG_PROG_UBOOT1 \
511 "$download_cmd $loadaddr $ubootfile; " \
512 "if test $? -eq 0; then " \
513 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
514 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
515 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \
516 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
517 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \
518 "if test $? -ne 0; then " \
519 "echo PROGRAM FAILED; " \
520 "else; " \
521 "echo PROGRAM SUCCEEDED; " \
522 "fi; " \
523 "else; " \
524 "echo DOWNLOAD FAILED; " \
525 "fi;"
526
527#define CONFIG_PROG_UBOOT2 \
528 "$download_cmd $loadaddr $ubootfile; " \
529 "if test $? -eq 0; then " \
530 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
531 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
532 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \
533 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
534 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \
535 "if test $? -ne 0; then " \
536 "echo PROGRAM FAILED; " \
537 "else; " \
538 "echo PROGRAM SUCCEEDED; " \
539 "fi; " \
540 "else; " \
541 "echo DOWNLOAD FAILED; " \
542 "fi;"
543
544#define CONFIG_BOOT_OS_NET \
545 "$download_cmd $osaddr $osfile; " \
546 "if test $? -eq 0; then " \
547 "if test -n $fdtaddr; then " \
548 "$download_cmd $fdtaddr $fdtfile; " \
549 "if test $? -eq 0; then " \
550 "bootm $osaddr - $fdtaddr; " \
551 "else; " \
552 "echo FDT DOWNLOAD FAILED; " \
553 "fi; " \
554 "else; " \
555 "bootm $osaddr; " \
556 "fi; " \
557 "else; " \
558 "echo OS DOWNLOAD FAILED; " \
559 "fi;"
560
561#define CONFIG_PROG_OS1 \
562 "$download_cmd $osaddr $osfile; " \
563 "if test $? -eq 0; then " \
564 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \
565 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \
566 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \
567 "if test $? -ne 0; then " \
568 "echo OS PROGRAM FAILED; " \
569 "else; " \
570 "echo OS PROGRAM SUCCEEDED; " \
571 "fi; " \
572 "else; " \
573 "echo OS DOWNLOAD FAILED; " \
574 "fi;"
575
576#define CONFIG_PROG_OS2 \
577 "$download_cmd $osaddr $osfile; " \
578 "if test $? -eq 0; then " \
579 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \
580 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \
581 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \
582 "if test $? -ne 0; then " \
583 "echo OS PROGRAM FAILED; " \
584 "else; " \
585 "echo OS PROGRAM SUCCEEDED; " \
586 "fi; " \
587 "else; " \
588 "echo OS DOWNLOAD FAILED; " \
589 "fi;"
590
591#define CONFIG_PROG_FDT1 \
592 "$download_cmd $fdtaddr $fdtfile; " \
593 "if test $? -eq 0; then " \
594 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \
595 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \
596 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \
597 "if test $? -ne 0; then " \
598 "echo FDT PROGRAM FAILED; " \
599 "else; " \
600 "echo FDT PROGRAM SUCCEEDED; " \
601 "fi; " \
602 "else; " \
603 "echo FDT DOWNLOAD FAILED; " \
604 "fi;"
605
606#define CONFIG_PROG_FDT2 \
607 "$download_cmd $fdtaddr $fdtfile; " \
608 "if test $? -eq 0; then " \
609 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \
610 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \
611 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \
612 "if test $? -ne 0; then " \
613 "echo FDT PROGRAM FAILED; " \
614 "else; " \
615 "echo FDT PROGRAM SUCCEEDED; " \
616 "fi; " \
617 "else; " \
618 "echo FDT DOWNLOAD FAILED; " \
619 "fi;"
620
621#define CONFIG_EXTRA_ENV_SETTINGS \
622 "autoload=yes\0" \
623 "download_cmd=tftp\0" \
624 "console_args=console=ttyS0,115200\0" \
625 "root_args=root=/dev/nfs rw\0" \
626 "misc_args=ip=on\0" \
627 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
628 "bootfile=/home/user/file\0" \
629 "osfile=/home/user/board.uImage\0" \
630 "fdtfile=/home/user/board.dtb\0" \
631 "ubootfile=/home/user/u-boot.bin\0" \
632 "fdtaddr=0x1e00000\0" \
633 "osaddr=0x1000000\0" \
634 "loadaddr=0x1000000\0" \
635 "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \
636 "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \
637 "prog_os1="CONFIG_PROG_OS1"\0" \
638 "prog_os2="CONFIG_PROG_OS2"\0" \
639 "prog_fdt1="CONFIG_PROG_FDT1"\0" \
640 "prog_fdt2="CONFIG_PROG_FDT2"\0" \
641 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
642 "bootcmd_flash1=run set_bootargs; " \
643 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
644 "bootcmd_flash2=run set_bootargs; " \
645 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
646 "bootcmd=run bootcmd_flash1\0"
647#endif
648